Searched hist:11505 (Results 1 - 1 of 1) sorted by relevance
| /gem5/src/arch/arm/ | ||
| H A D | tlb.cc | 11505:55256a05d9e9 Mon May 30 19:14:00 EDT 2016 Andreas Sandberg <andreas.sandberg@arm.com> arm: Correctly check translation mode (aarch64/aarch32) According to the ARM ARM (see AArch32.TranslateAddress in the pseudocode library), the TLB should be operating in aarch64 mode if the EL0 is aarch32 and EL1 is aarch64. This is currently not the case in gem5, which breaks 64/32 interprocessing. Update the check to match the reference manual. Change-Id: I6f1444d57c0e2eb5f8880f513f33a9197b7cb2ce Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Mitch Hayenga <mitch.hayenga@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> |
Completed in 15 milliseconds