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/gem5/src/mem/
H A Dpacket_access.hh11295:14029d75688d Mon Jan 11 16:20:00 EST 2016 Steve Reinhardt <stever@gmail.com> mem: fix bug in packet access endianness changes

The new Packet::setRaw() method incorrectly still contained
an htog() conversion. As a result, calls to the old set()
method (now defined as setRaw(htog(v))) underwent two htog
conversions, which breaks things when htog() is not a no-op.

Interestingly the only test that caught this was a SPARC
boot test, where an IsaFake device with a non-zero return
value was getting swapped twice resulting in a register
getting loaded with 0x100000000000000 instead of 1.
(Good reason for keeping SPARC around, perhaps?)

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