Searched hist:10192 (Results 1 - 3 of 3) sorted by relevance

/gem5/src/mem/cache/
H A Dmshr_queue.hh10192:5c2c4195b839 Fri May 09 18:58:00 EDT 2014 Mitch Hayenga <mitch.hayenga@arm.com> mem: Squash prefetch requests from downstream caches

This patch squashes prefetch requests from downstream caches,
so that they do not steal cachelines away from caches closer
to the cpu. It was originally coded by Mitch Hayenga and
modified by Aasheesh Kolli.
H A Dmshr_queue.cc10192:5c2c4195b839 Fri May 09 18:58:00 EDT 2014 Mitch Hayenga <mitch.hayenga@arm.com> mem: Squash prefetch requests from downstream caches

This patch squashes prefetch requests from downstream caches,
so that they do not steal cachelines away from caches closer
to the cpu. It was originally coded by Mitch Hayenga and
modified by Aasheesh Kolli.
/gem5/src/mem/
H A Dpacket.hh10192:5c2c4195b839 Fri May 09 18:58:00 EDT 2014 Mitch Hayenga <mitch.hayenga@arm.com> mem: Squash prefetch requests from downstream caches

This patch squashes prefetch requests from downstream caches,
so that they do not steal cachelines away from caches closer
to the cpu. It was originally coded by Mitch Hayenga and
modified by Aasheesh Kolli.

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