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| /gem5/src/arch/arm/insts/ |
| H A D | misc.hh | 64 MsrBase(const char *mnem, ExtMachInst _machInst, OpClass __opClass, uint8_t _byteMask) argument
77 MsrImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, uint32_t _imm, uint8_t _byteMask) argument
91 MsrRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _op1, uint8_t _byteMask) argument
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