Searched defs:IN_VALUE5 (Results 1 - 25 of 34) sorted by relevance

12

/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/
H A Ddisplay.h58 display( sc_module_name NAME, sc_clock& CLK, const sc_signal_bool_vector4& IN_VALUE1, const sc_signal_bool_vector5& IN_VALUE2, const sc_signal_bool_vector6& IN_VALUE3, const sc_signal_bool_vector7& IN_VALUE4, const sc_signal_bool_vector8& IN_VALUE5, const sc_signal<bool>& IN_VALID ) argument
H A Dsharing.h66 sharing( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET, const sc_signal_bool_vector4& IN_VALUE1, const sc_signal_bool_vector5& IN_VALUE2, const sc_signal_bool_vector6& IN_VALUE3, const sc_signal_bool_vector7& IN_VALUE4, const sc_signal_bool_vector8& IN_VALUE5, const sc_signal<bool>& IN_VALID, sc_signal<bool>& OUT_ACK, sc_signal_bool_vector4& OUT_VALUE1, sc_signal_bool_vector5& OUT_VALUE2, sc_signal_bool_vector6& OUT_VALUE3, sc_signal_bool_vector7& OUT_VALUE4, sc_signal_bool_vector8& OUT_VALUE5, sc_signal<bool>& OUT_VALID ) argument
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/
H A Ddisplay.h58 display( sc_module_name NAME, sc_clock& CLK, const sc_signal_bool_vector& IN_VALUE1, const sc_signal_bool_vector& IN_VALUE2, const sc_signal<long>& IN_VALUE3, const sc_signal<int>& IN_VALUE4, const sc_signal<short>& IN_VALUE5, const sc_signal<char>& IN_VALUE6, const sc_signal<bool>& IN_VALID ) argument
H A Ddatatypes.h73 datatypes( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET, const sc_signal_bool_vector& IN_VALUE1, const sc_signal_bool_vector& IN_VALUE2, const sc_signal<long>& IN_VALUE3, const sc_signal<int>& IN_VALUE4, const sc_signal<short>& IN_VALUE5, const sc_signal<char>& IN_VALUE6, const sc_signal<bool>& IN_VALID, sc_signal<bool>& OUT_ACK, sc_signal_bool_vector& OUT_VALUE1, sc_signal_bool_vector& OUT_VALUE2, sc_signal<long>& OUT_VALUE3, sc_signal<int>& OUT_VALUE4, sc_signal<short>& OUT_VALUE5, sc_signal<char>& OUT_VALUE6, sc_signal<bool>& OUT_VALID ) argument
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/
H A Ddisplay.h59 display( sc_module_name NAME, sc_clock& CLK, const sc_signal_bool_vector& IN_VALUE1, const sc_signal_bool_vector& IN_VALUE2, const sc_signal<long>& IN_VALUE3, const sc_signal<int>& IN_VALUE4, const sc_signal<short>& IN_VALUE5, const sc_signal<char>& IN_VALUE6, const sc_signal<bool>& IN_VALID ) argument
H A Ddatatypes.h74 datatypes( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET, const sc_signal_bool_vector& IN_VALUE1, const sc_signal_bool_vector& IN_VALUE2, const sc_signal<long>& IN_VALUE3, const sc_signal<int>& IN_VALUE4, const sc_signal<short>& IN_VALUE5, const sc_signal<char>& IN_VALUE6, const sc_signal<bool>& IN_VALID, sc_signal<bool>& OUT_ACK, sc_signal_bool_vector& OUT_VALUE1, sc_signal_bool_vector& OUT_VALUE2, sc_signal<long>& OUT_VALUE3, sc_signal<int>& OUT_VALUE4, sc_signal<short>& OUT_VALUE5, sc_signal<char>& OUT_VALUE6, sc_signal<bool>& OUT_VALID ) argument
/gem5/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/
H A Ddisplay.h59 display( sc_module_name NAME, sc_clock& CLK, const sc_signal_bool_vector& IN_VALUE1, const sc_signal_bool_vector& IN_VALUE2, const sc_signal<long>& IN_VALUE3, const sc_signal<int>& IN_VALUE4, const sc_signal<short>& IN_VALUE5, const sc_signal<char>& IN_VALUE6, const sc_signal<bool>& IN_VALID ) argument
H A Ddatatypes.h75 datatypes( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET, const sc_signal_bool_vector& IN_VALUE1, const sc_signal_bool_vector& IN_VALUE2, const sc_signal<long>& IN_VALUE3, const sc_signal<int>& IN_VALUE4, const sc_signal<short>& IN_VALUE5, const sc_signal<char>& IN_VALUE6, const sc_signal<char>& IN_VALUE7, const sc_signal<bool>& IN_VALID, sc_signal<bool>& OUT_ACK, sc_signal_bool_vector& OUT_VALUE1, sc_signal_bool_vector& OUT_VALUE2, sc_signal<long>& OUT_VALUE3, sc_signal<int>& OUT_VALUE4, sc_signal<short>& OUT_VALUE5, sc_signal<char>& OUT_VALUE6, sc_signal<bool>& OUT_VALID ) argument
/gem5/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/
H A Ddisplay.h59 display( sc_module_name NAME, sc_clock& CLK, const sc_signal_bool_vector& IN_VALUE1, const sc_signal_bool_vector& IN_VALUE2, const sc_signal<long>& IN_VALUE3, const sc_signal<int>& IN_VALUE4, const sc_signal<short>& IN_VALUE5, const sc_signal<char>& IN_VALUE6, const sc_signal<bool>& IN_VALID ) argument
/gem5/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/
H A Ddisplay.h59 display( sc_module_name NAME, sc_clock& CLK, const sc_signal_bool_vector& IN_VALUE1, const sc_signal_bool_vector& IN_VALUE2, const sc_signal<long>& IN_VALUE3, const sc_signal<int>& IN_VALUE4, const sc_signal<short>& IN_VALUE5, const sc_signal<char>& IN_VALUE6, const sc_signal<bool>& IN_VALID ) argument
/gem5/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/
H A Ddisplay.h59 display( sc_module_name NAME, sc_clock& CLK, const sc_signal_bool_vector& IN_VALUE1, const sc_signal_bool_vector& IN_VALUE2, const sc_signal<long>& IN_VALUE3, const sc_signal<int>& IN_VALUE4, const sc_signal<short>& IN_VALUE5, const sc_signal<char>& IN_VALUE6, const sc_signal<bool>& IN_VALID ) argument
/gem5/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/
H A Ddisplay.h62 display( sc_module_name NAME, sc_clock& CLK, const sc_signal_bool_vector8& IN_VALUE1, const sc_signal_bool_vector8& IN_VALUE2, const sc_signal<long>& IN_VALUE3, const sc_signal<int>& IN_VALUE4, const sc_signal<short>& IN_VALUE5, const sc_signal<char>& IN_VALUE6, const sc_signal<bool>& IN_VALUE7, const sc_signal_bool_vector4& IN_VALUE8, const sc_signal_logic_vector4& IN_VALUE9, const sc_signal<bool>& IN_VALID ) argument
/gem5/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/
H A Ddisplay.h62 display( sc_module_name NAME, sc_clock& CLK, const sc_signal_bool_vector8& IN_VALUE1, const sc_signal_bool_vector8& IN_VALUE2, const sc_signal<long>& IN_VALUE3, const sc_signal<int>& IN_VALUE4, const sc_signal<short>& IN_VALUE5, const sc_signal<char>& IN_VALUE6, const sc_signal<bool>& IN_VALUE7, const sc_signal_bool_vector4& IN_VALUE8, const sc_signal_logic_vector4& IN_VALUE9, const sc_signal<bool>& IN_VALID ) argument
/gem5/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/datatypes/
H A Ddisplay.h62 display( sc_module_name NAME, sc_clock& CLK, const sc_signal_bool_vector8& IN_VALUE1, const sc_signal_bool_vector8& IN_VALUE2, const sc_signal<long>& IN_VALUE3, const sc_signal<int>& IN_VALUE4, const sc_signal<short>& IN_VALUE5, const sc_signal<char>& IN_VALUE6, const sc_signal<bool>& IN_VALUE7, const sc_signal_bool_vector4& IN_VALUE8, const sc_signal_logic_vector4& IN_VALUE9, const sc_signal<bool>& IN_VALID ) argument
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/
H A Daddition.h70 addition( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET, const sc_signal<int>& IN_VALUE1, const sc_signal_bool_vector4& IN_VALUE2, const sc_signal_bool_vector4& IN_VALUE3, const sc_signal_bool_vector8& IN_VALUE4, const sc_signal_bool_vector8& IN_VALUE5, const sc_signal<bool>& IN_VALID, sc_signal<int>& OUT_VALUE1, sc_signal_bool_vector4& OUT_VALUE2, sc_signal_bool_vector4& OUT_VALUE3, sc_signal_bool_vector8& OUT_VALUE4, sc_signal_bool_vector8& OUT_VALUE5, sc_signal<bool>& OUT_VALID ) argument
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/
H A Dbitwidth.h72 bitwidth( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET, const sc_signal_bool_vector4& IN_VALUE1, const sc_signal_bool_vector4& IN_VALUE2, const sc_signal_bool_vector6& IN_VALUE3, const sc_signal_bool_vector6& IN_VALUE4, const sc_signal_bool_vector8& IN_VALUE5, const sc_signal_bool_vector8& IN_VALUE6, const sc_signal<bool>& IN_VALID, sc_signal_bool_vector4& OUT_VALUE1, sc_signal_bool_vector4& OUT_VALUE2, sc_signal_bool_vector6& OUT_VALUE3, sc_signal_bool_vector6& OUT_VALUE4, sc_signal_bool_vector8& OUT_VALUE5, sc_signal_bool_vector8& OUT_VALUE6, sc_signal<bool>& OUT_VALID ) argument
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/
H A Dsharing.h64 sharing( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET, const sc_signal_bool_vector4& IN_VALUE1, const sc_signal_bool_vector5& IN_VALUE2, const sc_signal_bool_vector6& IN_VALUE3, const sc_signal_bool_vector7& IN_VALUE4, const sc_signal_bool_vector8& IN_VALUE5, const sc_signal<bool>& IN_VALID, sc_signal_bool_vector4& OUT_VALUE1, sc_signal_bool_vector5& OUT_VALUE2, sc_signal_bool_vector6& OUT_VALUE3, sc_signal_bool_vector7& OUT_VALUE4, sc_signal_bool_vector8& OUT_VALUE5, sc_signal<bool>& OUT_VALID ) argument
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/
H A Ddivide.h65 divide( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET, const sc_signal<int>& IN_VALUE1, const sc_signal_bool_vector4& IN_VALUE2, const sc_signal_bool_vector4& IN_VALUE3, const sc_signal_bool_vector8& IN_VALUE4, const sc_signal_bool_vector8& IN_VALUE5, const sc_signal<bool>& IN_VALID, sc_signal<int>& OUT_VALUE1, sc_signal_bool_vector4& OUT_VALUE2, sc_signal_bool_vector4& OUT_VALUE3, sc_signal_bool_vector8& OUT_VALUE4, sc_signal_bool_vector8& OUT_VALUE5, sc_signal<bool>& OUT_VALID ) argument
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/
H A Dmodulo.h71 modulo( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET, const sc_signal<int>& IN_VALUE1, const sc_signal_bool_vector4& IN_VALUE2, const sc_signal_bool_vector4& IN_VALUE3, const sc_signal_bool_vector8& IN_VALUE4, const sc_signal_bool_vector8& IN_VALUE5, const sc_signal<bool>& IN_VALID, sc_signal<int>& OUT_VALUE1, sc_signal_bool_vector4& OUT_VALUE2, sc_signal_bool_vector4& OUT_VALUE3, sc_signal_bool_vector8& OUT_VALUE4, sc_signal_bool_vector8& OUT_VALUE5, sc_signal<bool>& OUT_VALID ) argument
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/
H A Dmult.h71 mult( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET, const sc_signal<int>& IN_VALUE1, const sc_signal_bool_vector4& IN_VALUE2, const sc_signal_bool_vector4& IN_VALUE3, const sc_signal_bool_vector8& IN_VALUE4, const sc_signal_bool_vector8& IN_VALUE5, const sc_signal<bool>& IN_VALID, sc_signal<int>& OUT_VALUE1, sc_signal_bool_vector4& OUT_VALUE2, sc_signal_bool_vector4& OUT_VALUE3, sc_signal_bool_vector8& OUT_VALUE4, sc_signal_bool_vector8& OUT_VALUE5, sc_signal<bool>& OUT_VALID ) argument
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/
H A Dsubtract.h65 subtraction( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET, const sc_signal<int>& IN_VALUE1, const sc_signal_bool_vector4& IN_VALUE2, const sc_signal_bool_vector4& IN_VALUE3, const sc_signal_bool_vector8& IN_VALUE4, const sc_signal_bool_vector8& IN_VALUE5, const sc_signal<bool>& IN_VALID, sc_signal<int>& OUT_VALUE1, sc_signal_bool_vector4& OUT_VALUE2, sc_signal_bool_vector4& OUT_VALUE3, sc_signal_bool_vector8& OUT_VALUE4, sc_signal_bool_vector8& OUT_VALUE5, sc_signal<bool>& OUT_VALID ) argument
/gem5/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/
H A Dand_1.h65 and_1( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET, const sc_signal<int>& IN_VALUE1, const sc_signal<unsigned int>& IN_VALUE2, const sc_signal_bool_vector& IN_VALUE3, const sc_signal_bool_vector& IN_VALUE4, const sc_signal_bool_vector& IN_VALUE5, const sc_signal<bool>& IN_VALID, sc_signal<int>& OUT_VALUE1, sc_signal<unsigned int>& OUT_VALUE2, sc_signal_bool_vector& OUT_VALUE3, sc_signal_bool_vector& OUT_VALUE4, sc_signal_bool_vector& OUT_VALUE5, sc_signal<bool>& OUT_VALID ) argument
/gem5/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/
H A Dnot_1.h65 not_1( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET, const sc_signal<int>& IN_VALUE1, const sc_signal<unsigned int>& IN_VALUE2, const sc_signal_bool_vector& IN_VALUE3, const sc_signal_bool_vector& IN_VALUE4, const sc_signal_bool_vector& IN_VALUE5, const sc_signal<bool>& IN_VALID, sc_signal<int>& OUT_VALUE1, sc_signal<unsigned int>& OUT_VALUE2, sc_signal_bool_vector& OUT_VALUE3, sc_signal_bool_vector& OUT_VALUE4, sc_signal_bool_vector& OUT_VALUE5, sc_signal<bool>& OUT_VALID ) argument
/gem5/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/
H A Dor_1.h65 or_1( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET, const sc_signal<int>& IN_VALUE1, const sc_signal<unsigned int>& IN_VALUE2, const sc_signal_bool_vector& IN_VALUE3, const sc_signal_bool_vector& IN_VALUE4, const sc_signal_bool_vector& IN_VALUE5, const sc_signal<bool>& IN_VALID, sc_signal<int>& OUT_VALUE1, sc_signal<unsigned int>& OUT_VALUE2, sc_signal_bool_vector& OUT_VALUE3, sc_signal_bool_vector& OUT_VALUE4, sc_signal_bool_vector& OUT_VALUE5, sc_signal<bool>& OUT_VALID ) argument
/gem5/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/
H A Dbitwidth.h73 bitwidth( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET, const sc_signal_bool_vector4& IN_VALUE1, const sc_signal_bool_vector4& IN_VALUE2, const sc_signal_bool_vector6& IN_VALUE3, const sc_signal_bool_vector6& IN_VALUE4, const sc_signal_bool_vector8& IN_VALUE5, const sc_signal_bool_vector8& IN_VALUE6, const sc_signal<bool>& IN_VALID, sc_signal_bool_vector4& OUT_VALUE1, sc_signal_bool_vector4& OUT_VALUE2, sc_signal_bool_vector6& OUT_VALUE3, sc_signal_bool_vector6& OUT_VALUE4, sc_signal_bool_vector8& OUT_VALUE5, sc_signal_bool_vector8& OUT_VALUE6, sc_signal<bool>& OUT_VALID ) argument

Completed in 24 milliseconds

12