Searched defs:CSR_MHPMEVENT17 (Results 1 - 2 of 2) sorted by relevance
/gem5/src/arch/riscv/ | ||
H A D | registers.hh | 407 CSR_MHPMEVENT17 = 0x331, enumerator in enum:RiscvISA::CSRIndex |
/gem5/tests/test-progs/asmtest/src/riscv/env/ | ||
H A D | encoding.h | 880 #define CSR_MHPMEVENT17 0x331 macro |
Completed in 18 milliseconds