Searched defs:CLK (Results 51 - 75 of 451) sorted by relevance

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/gem5/src/systemc/tests/systemc/misc/gnats/pr-130/
H A Dpr-130.cpp48 pr130( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& X ) argument
67 pr130_2( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& X ) argument
/gem5/src/systemc/tests/systemc/misc/gnats/pr-2/
H A Dpr-2.cpp55 foo( sc_module_name name, sc_clock& CLK, const sc_signal<bool>& A, const sc_signal<bool>& B, sc_signal<bool>& C ) argument
/gem5/src/systemc/tests/systemc/misc/gnats/pr-233/
H A Dpr-233.cpp61 pr233( sc_module_name NAME, sc_clock& CLK, const sc_signal<int*>& X, const sc_signal<int*>& Y, const sc_signal<int>& Q, sc_signal<int*>& Z ) argument
/gem5/src/systemc/tests/systemc/misc/gnats/pr-47_3/
H A Dpr-47_3.cpp51 dub( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& A, const sc_signal<bool>& B, sc_signal<bool>& C, sc_signal<bool>& D ) argument
/gem5/src/systemc/tests/systemc/misc/gnats/pr213/
H A Dpr213.cpp50 abc( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& A, const sc_signal<bool>& B, sc_signal<bool>& C ) argument
/gem5/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/
H A Dgetres.h53 getres( sc_module_name NAME, sc_clock& CLK, sc_signal<float>& RESULT, sc_signal<bool>& POP ) argument
/gem5/src/systemc/tests/systemc/misc/sim_tests/hshake2/
H A Dproc1.h54 proc1( sc_module_name NAME, sc_clock& CLK, sc_signal<bool>& DATA_ACK, sc_signal<int>& DATA, sc_signal<bool>& DATA_READY ) argument
H A Dproc2.h54 proc2( sc_module_name NAME, sc_clock& CLK, sc_signal<bool>& DATA_READY, sc_signal<int>& DATA, sc_signal<bool>& DATA_ACK ) argument
/gem5/src/systemc/tests/systemc/misc/sim_tests/tri_state2/
H A Ddriver.h54 driver( sc_module_name NAME, sc_clock& CLK, const sc_signal_resolved& IN1, sc_signal<bool>& CONTROL, sc_signal<bool>& OUT1 ) argument
/gem5/src/systemc/tests/systemc/misc/unit/control/demo1/
H A Dproc1.h51 proc1(sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& DATA_ACK, sc_signal<bool>& DATA_READY) argument
H A Dproc2.h51 proc2(sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& DATA_READY, sc_signal<bool>& DATA_ACK) argument
/gem5/src/systemc/tests/systemc/misc/unit/structs/test3/
H A Dstimulus.h39 sc_in_clk CLK; local
/gem5/src/systemc/tests/systemc/misc/user_guide/chpt11.2/
H A Dmean.h55 mean(sc_module_name NAME, sc_clock& CLK, const signal_bool_vector& IN_, signal_bool_vector& OUT_) argument
/gem5/src/systemc/tests/systemc/misc/user_guide/chpt3.1/
H A Dsg.h53 stimgen(sc_module_name NAME, sc_clock& CLK, sc_signal<char>& STREAM, sc_signal<bool>& DATA_READY) argument
/gem5/src/systemc/tests/systemc/misc/user_guide/chpt3.2/
H A Dsg.h53 stimgen(sc_module_name NAME, sc_clock& CLK, sc_signal<char>& STREAM, sc_signal<bool>& DATA_READY) argument
/gem5/src/systemc/tests/systemc/misc/user_guide/chpt4.1/
H A Dnumgen.h53 numgen(sc_module_name NAME, sc_clock& CLK, sc_signal<double>& OUT1, sc_signal<double>& OUT2) argument
/gem5/src/systemc/tests/systemc/misc/user_guide/chpt4.2/
H A Dnumgen.h53 numgen(sc_module_name NAME, sc_clock& CLK, sc_signal<double>& OUT1, sc_signal<double>& OUT2) argument
H A Dpipeline.h51 pipeline(sc_module_name NAME, sc_clock& CLK, const sc_signal<double>& IN1, const sc_signal<double>& IN2, sc_signal<double>& OUT_) argument
/gem5/src/systemc/tests/systemc/misc/user_guide/chpt4.4/
H A Dnumgen.h53 numgen(sc_module_name NAME, sc_clock& CLK, sc_signal<double>& OUT1, sc_signal<double>& OUT2) argument
H A Dpipeline.h50 pipeline(sc_module_name NAME, sc_clock& CLK, const sc_signal<double>& IN1, const sc_signal<double>& IN2, sc_signal<double>& OUT_) argument
H A Dstage1.cpp59 f_stage1(const char *NAME, sc_clock& CLK, const sc_signal<double>& IN1, const sc_signal<double>& IN2, sc_signal<double>& SUM, sc_signal<double>& DIFF) argument
H A Dstage2.cpp59 f_stage2(const char *NAME, sc_clock& CLK, const sc_signal<double>& SUM, const sc_signal<double>& DIFF, sc_signal<double>& PROD, sc_signal<double>& QUOT) argument
/gem5/src/systemc/tests/systemc/tracing/wif_trace/pct1/
H A Dmonitor.h50 monitor( sc_module_name NAME, sc_clock& CLK, sc_signal<bool>& TX, sc_signal<int>& DOUT, sc_signal<bool>& WR ) argument
H A Dtx.h52 sio_tx( sc_module_name NAME, sc_clock& CLK, sc_signal<bool>& TWO_STOP_BITS, sc_signal<bool>& TX ) argument
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/
H A Ddisplay.h53 display( sc_module_name NAME, sc_clock& CLK, const sc_signal<int>& IN_DATA1, const sc_signal_bool_vector4& IN_DATA2, const sc_signal_bool_vector4& IN_DATA3, const sc_signal_bool_vector8& IN_DATA4, const sc_signal_bool_vector8& IN_DATA5, const sc_signal<bool>& IN_VALID ) argument

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