Redirecting stdout to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64m/o3-timing/simout Redirecting stderr to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64m/o3-timing/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. gem5 compiled Jul 13 2017 17:09:45 gem5 started Jul 13 2017 17:11:34 gem5 executing on boldrock, pid 1866 command line: /home/ar4jc/gem5/build/RISCV/gem5.opt -d build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64m/o3-timing --stats-file 'text://stats.txt?desc=False' -re /home/ar4jc/gem5/tests/testing/../run.py quick/se/02.insttest/riscv/linux-rv64m/o3-timing Global frequency set at 1000000000000 ticks per second mul: PASS mul, overflow: PASS mulh: PASS mulh, negative: PASS mulh, all bits set: PASS mulhsu, all bits set: PASS mulhsu: PASS mulhu: PASS mulhu, all bits set: PASS div: PASS div/0: PASS div, overflow: PASS divu: PASS divu/0: PASS divu, "overflow": PASS rem: PASS rem/0: PASS rem, overflow: PASS remu: PASS remu/0: PASS remu, "overflow": PASS mulw, truncate: PASS mulw, overflow: PASS divw, truncate: PASS divw/0: PASS divw, overflow: PASS divuw, truncate: PASS divuw/0: PASS divuw, "overflow": PASS divuw, sign extend: PASS remw, truncate: PASS remw/0: PASS remw, overflow: PASS remuw, truncate: PASS remuw/0: PASS remuw, "overflow": PASS remuw, sign extend: PASS Exiting @ tick 124491500 because exiting with last active thread context