// -*- mode:c++ -*- // Copyright .AN) 2007 MIPS Technologies, Inc. All Rights Reserved // This software is part of the M5 simulator. // THIS IS A LEGAL AGREEMENT. BY DOWNLOADING, USING, COPYING, CREATING // DERIVATIVE WORKS, AND/OR DISTRIBUTING THIS SOFTWARE YOU ARE AGREEING // TO THESE TERMS AND CONDITIONS. // Permission is granted to use, copy, create derivative works and // distribute this software and such derivative works for any purpose, // so long as (1) the copyright notice above, this grant of permission, // and the disclaimer below appear in all copies and derivative works // made, (2) the copyright notice above is augmented as appropriate to // reflect the addition of any new copyrightable work in a derivative // work (e.g., Copyright .AN) Copyright Owner), and (3) // the name of MIPS Technologies, Inc. ($B!H(BMIPS$B!I(B) is not used in any // advertising or publicity pertaining to the use or distribution of // this software without specific, written prior authorization. // THIS SOFTWARE IS PROVIDED $B!H(BAS IS.$B!I(B MIPS MAKES NO WARRANTIES AND // DISCLAIMS ALL WARRANTIES, WHETHER EXPRESS, STATUTORY, IMPLIED OR // OTHERWISE, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF // MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND // NON-INFRINGEMENT OF THIRD PARTY RIGHTS, REGARDING THIS SOFTWARE. // IN NO EVENT SHALL MIPS BE LIABLE FOR ANY DAMAGES, INCLUDING DIRECT, // INDIRECT, INCIDENTAL, CONSEQUENTIAL, SPECIAL, OR PUNITIVE DAMAGES OF // ANY KIND OR NATURE, ARISING OUT OF OR IN CONNECTION WITH THIS AGREEMENT, // THIS SOFTWARE AND/OR THE USE OF THIS SOFTWARE, WHETHER SUCH LIABILITY // IS ASSERTED ON THE BASIS OF CONTRACT, TORT (INCLUDING NEGLIGENCE OR // STRICT LIABILITY), OR OTHERWISE, EVEN IF MIPS HAS BEEN WARNED OF THE // POSSIBILITY OF ANY SUCH LOSS OR DAMAGE IN ADVANCE. //Authors: Korey L. Sewell //////////////////////////////////////////////////////////////////// // // TlbOp instructions // output header {{ /** * Base class for integer operations. */ class TlbOp : public MipsStaticInst { protected: /// Constructor TlbOp(const char *mnem, MachInst _machInst, OpClass __opClass) : MipsStaticInst(mnem, _machInst, __opClass) { } std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; }; }}; output decoder {{ std::string TlbOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const { return "Disassembly of integer instruction\n"; } }}; def template TlbOpExecute {{ Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const { //Write the resulting state to the execution context %(op_wb)s; //Call into the trap handler with the appropriate fault return No_Fault; } }}; // Primary format for integer operate instructions: def format TlbOp(code, *opt_flags) {{ orig_code = code cblk = code iop = InstObjParams(name, Name, 'MipsStaticInst', cblk, opt_flags) header_output = BasicDeclare.subst(iop) decoder_output = BasicConstructor.subst(iop) decode_block = BasicDecodeWithMnemonic.subst(iop) exec_output = TlbOpExecute.subst(iop) }};