src/riscv/rv64c.h

38 #define CIOP(op, r, imm) asm volatile(op " %0,%1" : "+r" (r) : "i" (imm));
45 c_li(const int8_t imm)
48     CIOP("c.li", rd, imm);
53 c_lui(const int8_t imm)
56     CIOP("c.lui", rd, imm);
61 c_addi(int64_t r, const int8_t imm)
63     CIOP("c.addi", r, imm);
68 c_addiw(int64_t r, const int8_t imm)
70     CIOP("c.addiw", r, imm);
75 c_addi4spn(const int16_t imm)
78     asm volatile("c.addi4spn %0,sp,%1" : "=r" (rd) : "i" (imm));
104 c_andi(uint64_t r, uint8_t imm)
106     CIOP("c.andi", r, imm);