Lines Matching defs:addr
25 #define flush_page(addr) asm volatile ("sfence.vma %0" : : "r" (addr) : "memory")
75 typedef struct { pte_t addr; void* next; } freelist_t;
94 static void evict(unsigned long addr)
96 assert(addr >= PGSIZE && addr < MAX_TEST_PAGES * PGSIZE);
97 addr = addr/PGSIZE*PGSIZE;
99 freelist_t* node = &user_mapping[addr/PGSIZE];
100 if (node->addr)
103 assert(user_l3pt[addr/PGSIZE] & PTE_A);
105 if (memcmp((void*)addr, uva2kva(addr), PGSIZE)) {
106 assert(user_l3pt[addr/PGSIZE] & PTE_D);
107 memcpy((void*)addr, uva2kva(addr), PGSIZE);
111 user_mapping[addr/PGSIZE].addr = 0;
123 void handle_fault(uintptr_t addr, uintptr_t cause)
125 assert(addr >= PGSIZE && addr < MAX_TEST_PAGES * PGSIZE);
126 addr = addr/PGSIZE*PGSIZE;
128 if (user_l3pt[addr/PGSIZE]) {
129 if (!(user_l3pt[addr/PGSIZE] & PTE_A)) {
130 user_l3pt[addr/PGSIZE] |= PTE_A;
132 assert(!(user_l3pt[addr/PGSIZE] & PTE_D) && cause == CAUSE_STORE_PAGE_FAULT);
133 user_l3pt[addr/PGSIZE] |= PTE_D;
135 flush_page(addr);
145 uintptr_t new_pte = (node->addr >> PGSHIFT << PTE_PPN_SHIFT) | PTE_V | PTE_U | PTE_R | PTE_W | PTE_X;
146 user_l3pt[addr/PGSIZE] = new_pte | PTE_A | PTE_D;
147 flush_page(addr);
149 assert(user_mapping[addr/PGSIZE].addr == 0);
150 user_mapping[addr/PGSIZE] = *node;
153 memcpy((void*)addr, uva2kva(addr), PGSIZE);
156 user_l3pt[addr/PGSIZE] = new_pte;
157 flush_page(addr);
263 freelist_nodes[i].addr = DRAM_BASE + (MAX_TEST_PAGES + random)*PGSIZE;