Lines Matching defs:system
74 # system simulated
75 system = System(cpu = cpus)
77 system.voltage_domain = VoltageDomain()
78 system.clk_domain = SrcClockDomain(clock = '1GHz',
79 voltage_domain = system.voltage_domain)
83 system.cpu_clk_domain = SrcClockDomain(clock = '2GHz',
84 voltage_domain = system.voltage_domain)
88 cpu.clk_domain = system.cpu_clk_domain
90 system.mem_ranges = AddrRange('256MB')
92 Ruby.create_system(options, False, system)
95 system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock,
96 voltage_domain = system.voltage_domain)
98 assert(len(cpus) == len(system.ruby._cpu_ports))
100 for (i, ruby_port) in enumerate(system.ruby._cpu_ports):
117 root = Root(full_system = False, system = system)
118 root.system.mem_mode = 'timing'