Lines Matching refs:r17
445 ldq_p r0,0(r17) // get the data
454 stq_p r18, 0(r17) // store the data
461 ldq r16, 0(r17) // restore r16
462 ldq r17, 8(r17) // restore r17
520 // r16, r17, r18 - available
567 // a1/r17 - contains interrupt vector
689 subq r10,r14,r17 // subtract from
692 mulq r17,r13,r17 // compute 0x900 + (0x10 * Highest DIRn-bit)
693 addq r17,r16,r17
925 or r13, r31, r17 // move vector to a1
980 lda r17, scb_v_pwrfail(r31) // a1 to interrupt vector
1021 // r16, r17, r18 - available
1177 lda r17, scb_v_proc_corr_err(r31) // a1 <- interrupt vector
1180 lda r17, scb_v_sys_corr_err(r31) // a1 <- interrupt vector
1331 lda r17, scb_v_perfmon(r31) // a1 to interrupt vector
1372 // r17 - new PC
1535 // r17 - new PC
1556 bic r17, 3, r17 // clean use pc
1557 mtpr r17, exc_addr // set new pc
2054 stq r17, osfsf_a1(sp) // a1
2055 mfpr r17, pt_misc // get vector
2063 extwl r17, 2, r17 // a1 <- interrupt vector
2083 lda r17, scb_v_sysmchk(r31) // a1 <- interrupt vector
2143 // r17 = exc_mask
2180 stq r17, osfsf_a1(sp)
2181 mfpr r17, ev5__exc_mask // Get exception register mask IPR - no mtpr exc_sum in next cycle
2332 // r17 sc_ctl with flush bit cleared