Lines Matching refs:mtpr
278 mtpr r14, pt14; /* save it */ \
384 mtpr r12, exc_addr
439 mtpr t8,exc_addr
931 mtpr r12, exc_addr
945 mtpr r11, ev5__dtb_cm // Restore Mbox current mode for ps
984 mtpr r25, exc_addr
1002 mtpr r11, dtb_cm // Restore Mbox current mode
1005 mtpr r0, pt0
1038 mtpr r9, ev5__hwint_clr // ack the crd interrupt
1045 mtpr r0, pt0 // save r0 for scratch
1047 mtpr r1, pt1 // save r0 for scratch
1083 8: mtpr r14, pt_mces // Store updated MCES
1186 mtpr r25, exc_addr // load interrupt vector
1283 mtpr r12, pt10 // Stash exc_addr
1286 mtpr r0, pt0 // Stash for scratch
1298 mtpr r14, pt_misc // Save mchk code!scbv!whami!mces
1301 mtpr r1, pt1 // Stash for scratch
1304 mtpr r4, pt4
1306 mtpr r5, pt5
1308 mtpr r6, pt6
1335 mtpr r25, exc_addr
1351 mtpr r25, hwint_clr
1380 // mtpr r31, ic_flush_ctl // do not flush the icache - done by hardware before SROM load
1381 mtpr r31, itb_ia // clear the ITB
1382 mtpr r31, dtb_ia // clear the DTB
1385 mtpr r1, pal_base // initialize PAL_BASE
1388 mtpr r31, astrr // stop ASTs
1389 mtpr r31, aster // stop ASTs
1390 mtpr r31, sirr // clear software interrupts
1392 mtpr r0, pt1 // r0 is whami (unless we entered via swp)
1400 mtpr r1, icsr // ICSR - Shadows enabled, Floating point enable,
1406 mtpr r1, mcsr // MCSR - Super page enabled
1409 // mtpr r1, dc_mode // turn Dcache on
1416 mtpr r31, dc_flush // flush Dcache
1421 mtpr r1, ipl // set internal <ipl>=1F
1422 mtpr r31, ev5__ps // set new ps<cm>=0, Ibox copy
1423 mtpr r31, dtb_cm // set new ps<cm>=0, Mbox copy
1445 mtpr r1, pt_intmask // Stash in PALtemp
1448 mtpr r31, exc_sum // clear out exeception summary and exc_mask
1452 mtpr r8, icperr_stat // Clear Icache parity error & timeout status
1455 mtpr r8, dcperr_stat // Clear Dcache parity error status
1458 mtpr r31, pt_trap
1466 mtpr r31, dtb_asn
1467 mtpr r31, itb_asn
1471 mtpr r1, hwint_clr // Clear hardware interrupt requests
1477 mtpr r1, pt_misc // store whami and mces, swap bit clear
1480 mtpr r0, pt0 // save entry type
1485 mtpr r31, cc // clear Cycle Counter
1486 mtpr r9, cc_ctl // clear and enable the Cycle Counter
1487 mtpr r31, pt_scc // clear System Cycle Counter
1491 mtpr r31, maf_mode // no mbox instructions for 3 cycles
1493 mtpr r1, pt_scbb // load scbb
1494 mtpr r31, pt_prbr // clear out prbr
1512 mtpr r1, pt_pcbb // load pcbb
1515 mtpr r1, mvptbr
1516 mtpr r1, ivptbr
1517 mtpr r31, pt_ptbr
1519 mtpr r31, pmctr
1542 mtpr r0, pt_misc
1553 mtpr r25, pt_ptbr // load the new mmptr
1554 mtpr r18, pt_pcbb // set new pcbb
1557 mtpr r17, exc_addr // set new pc
1558 mtpr r19, mvptbr
1559 mtpr r19, ivptbr
1562 mtpr r30, pt_usp // save usp
1565 mtpr r8, dtb_asn
1567 mtpr r24, itb_asn
1576 mtpr r25, icsr // update ibox ipr
1580 mtpr r1, cc // set new offset
1602 mtpr r0, pt0 // Stash for scratch -- OK if Cbox overwrites
1631 mtpr r14, pt_mces
1640 mtpr r4, pt4
1642 mtpr r14, pt_misc // Store updated MCES, MCHK code, and SCBv
1645 mtpr r1, pt1 // Stash for scratch - 30 instructions
1648 mtpr r12, pt10 // Stash exc_addr
1652 mtpr r31, ic_flush_ctl // Second Icache flush, now it is really flushed.
1655 mtpr r6, pt6
1656 mtpr r5, pt5
1703 mtpr r31, dc_flush // Flush the Dcache
1910 mtpr r8, dcperr_stat // Clear Dcache parity error status
1913 mtpr r8, icperr_stat // Clear Icache parity error & timeout status
1999 mtpr r1, pt_misc // save new vector field
2014 mtpr r31, exc_sum // Clear Exception Summary
2035 mtpr r31, dtb_cm
2036 mtpr r31, ev5__ps
2038 mtpr r30, pt_usp // save user stack
2058 mtpr r25, exc_addr //
2066 mtpr r25, ipl // Set internal ipl
2089 mtpr r25, exc_addr // load interrupt vector
2157 mtpr r31, ev5__dtb_cm // Set Mbox current mode to kernel
2159 mtpr r14, pt0
2161 mtpr r1, pt1 // get a scratch reg
2168 mtpr r30, pt_usp // save user stack
2175 mtpr r31, ev5__ps // Set Ibox current mode to kernel
2181 mfpr r17, ev5__exc_mask // Get exception register mask IPR - no mtpr exc_sum in next cycle
2195 mtpr r1, pt10 // Set new PC
2236 mtpr r1, pt4
2237 mtpr r3, pt5
2243 mtpr r1, exc_addr