Lines Matching refs:r25
47 bsr r25, put_exc_addr; \
114 // r25 local scratch
201 sll r11, 63-osfps_v_mode, r25 // Shift mode up to MS bit
205 bge r25, TRAP_IACCVIO_10_ // no stack swap needed if cm=kern
260 mfpr r25, ev5__isr // Fetch interrupt summary register
262 srl r25, isr_v_hlt, r9 // Get HLT bit
343 and r8, osfpte_m_foe, r25 // Look for FOE set.
347 bne r25, foe_ipte_handler // FOE is set
492 sll r11, 63-osfps_v_mode, r25 // Shift mode up to MS bit
510 bge r25, UNALIGN_NO_DISMISS_10_ // no stack swap needed if cm=kern
521 mfpr r25, ev5__va // Unlock VA
524 mtpr r25, pt0 // Stash VA
528 srl r13, mm_stat_v_opcode-mm_stat_v_ra, r25// Isolate opcode
534 and r25, mm_stat_m_opcode, r17// Clean opocde for a1
540 mfpr r25, pt_entuna // get entry point
568 sll r11, 63-osfps_v_mode, r25 // Shift mode up to MS bit
601 bge r25, dfault_trap_cont // no stack swap needed if cm=kern
648 sll r11, 63-osfps_v_mode, r25 // Shift mode up to MS bit
655 bge r25, TRAP_OPCDEC_10_ // no stack swap needed if cm=kern
711 bis r11, r31, r25 // save ps
721 bis r31, r31, r25 // set the new ps
740 bis r25, r31, r11 // set new ps
774 sll r11, 63-osfps_v_mode, r25 // Shift mode up to MS bit
784 bge r25, TRAP_FEN_10_ // no stack swap needed if cm=kern
795 srl r13, icsr_v_fpe, r25 // Shift FP enable to bit 0
808 blbs r25,fen_to_opcdec // If FP is enabled, this is really OPCDEC.
853 mfpr r25, ev5__va // Fetch VA/unlock
859 bis r25, r31, r16 // a0 <- va
868 mfpr r25, pt_entmm // get entry point
873 mtpr r25, exc_addr // load exc_addr with entMM
884 // r25 - entUna
890 mtpr r25, exc_addr // load exc_addr with entUna
998 lda r25, mchk_c_os_bugcheck(r31) // fetch mchk code
1153 mtpr r25, pt_ksp // save off incase RTI to user
1169 mtpr r25, pt_ksp // save off incase RTI to user
1172 or r25, r31, sp // sp
1185 bic r25, r24, r25 // clean icsr<FPE,PMP>
1191 or r25, r12, r25 // icsr with new fen
1200 or r25, r22, r25 // icsr with new pme
1208 mtpr r25, icsr // write the icsr
1211 ldq_p r25, osfpcb_q_usp(r16) // get new usp
1221 mtpr r25, pt_usp // save usp
1276 sll r11, 63-osfps_v_mode, r25 // Shift mode up to MS bit
1280 bge r25, foe_ipte_handler_10_ // no stack swap needed if cm=kern
1293 foe_ipte_handler_10_: srl r8, osfpte_v_kre, r25 // get kre to <0>
1309 cmovlbs r25, mmcsr_c_foe, r17 // otherwise FOE
1335 sll r11, 63-osfps_v_mode, r25 // Shift mode up to MS bit
1339 bge r25, invalid_ipte_handler_10_ // no stack swap needed if cm=kern
1352 invalid_ipte_handler_10_: srl r8, osfpte_v_kre, r25 // get kre to <0>
1365 and r25, 1, r17 // Isolate kre
1404 srl r9, mm_stat_v_opcode, r25 // shift opc to <0>
1407 and r25, mm_stat_m_opcode, r25 // isolate opcode
1409 cmpeq r25, evx_opc_sync, r25 // is it FETCH/FETCH_M?
1410 blbs r25, nmiss_fetch_ldr31_err // yes
1416 srl r9, mm_stat_v_ra, r25 // Shift rnum to low bits
1418 and r25, 0x1F, r25 // isolate rnum
1421 cmpeq r25, 0x1F, r25 // Is the rnum r31 or f31?
1422 bne r25, nmiss_fetch_ldr31_err // Yes, dismiss the fault
1425 sll r11, 63-osfps_v_mode, r25 // Shift mode up to MS bit
1430 bge r25, invalid_dpte_no_dismiss_10_ // no stack swap needed if cm=kern
1441 or r10, r31, r25 // Save va in case TBmiss on stack
1445 or r25, r31, r16 // pass va as a0
1450 srl r12, osfpte_v_kwe-osfpte_v_kre, r25 // get write enable to <0>
1454 cmovlbs r13, r25, r12 // if write access move acv based on write enable
1457 mfpr r25, pt0 // get ps
1462 stq r25, osfsf_ps(sp) // save ps
1626 sll r11, 63-osfps_v_mode, r25 // Shift mode up to MS bit
1633 bge r25, osfpal_calpal_opcdec_10_ // no stack swap needed if cm=kern
1682 and r11, osfps_m_mode, r25 // get mode
1683 beq r25, pal_update_pcb_10_ // in kern? no need to update user sp
1807 SAVE_GPR(r25,CNS_Q_GPR+0xC8,r1)
1865 SAVE_SHADOW(r25,CNS_Q_SHADOW+0x38,r1)
2232 RESTORE_SHADOW(r25,CNS_Q_SHADOW+0x38,r1)
2282 RESTORE_GPR(r25,CNS_Q_GPR+0xC8,r1)
2357 //simos bsr r25, put_hex
2358 lda r25, mchk_c_bugcheck(r31)
2359 addq r25, 1, r25 // set flag indicating we came from interrupt and stack is already pushed
2364 lda r25, mchk_c_bugcheck(r31)
2367 sll r25, 32, r25 // Move mchk code to position
2375 or r12, r25, r12 // Combine mchk code
2376 lda r25, scb_v_procmchk(r31) // Get SCB vector
2378 sll r25, 16, r25 // Move SCBv to position
2379 or r12, r25, r25 // Combine SCBv
2382 bis r25, mces_m_mchk, r25 // Set MCES<MCHK> bit
2384 mtpr r25, pt_misc // Save mchk code!scbv!whami!mces
2870 srl r13, 32, r25 // move offset
2878 addl r13, r25, r25 // merge for new time
2880 stl_p r25, osfpcb_l_cc(r0) // save time
2884 mfpr r25, icsr // get current icsr
3219 // r23, r25 junked
3224 lda r25, osfsf_c_size(sp) // pop stack
3225 bis r25, r31, r14 // touch r25 & r14 to stall mf exc_addr
3243 mtpr r25, pt_ksp // save kern stack
3273 lda r25, osfsf_c_size(sp) // get updated sp
3274 bis r25, r31, r14 // touch r14,r25 to stall mf exc_addr
3279 ldq r12, -6*8(r25) // get ps
3280 ldq r13, -5*8(r25) // pc
3282 ldq r18, -1*8(r25) // a2
3283 ldq r17, -2*8(r25) // a1
3285 ldq r16, -3*8(r25) // a0
3286 ldq r29, -4*8(r25) // gp
3289 stl_c r31, -4(r25) // clear lock_flag
3321 sll r11, 63-osfps_v_mode, r25 // Shift mode up to MS bit
3325 bge r25, CALL_PAL_bpt_10_ // no stack swap needed if cm=kern
3362 sll r11, 63-osfps_v_mode, r25 // Shift mode up to MS bit
3366 bge r25, CALL_PAL_bugchk_10_ // no stack swap needed if cm=kern
3658 sll r11, 63-osfps_v_mode, r25 // Shift mode up to MS bit
3662 bge r25, CALL_PAL_gentrap_10_ // no stack swap needed if cm=kern
3787 and r17, r8, r25 // isolate pmctr mux select bits
3790 or r0,r25, r25 // or in new mux select bits
3791 mtpr r25, ev5__pmctr
3805 and r17, r8, r25 // isolate bc_ctl mux select bits
3807 or r16, r25, r25 // create new bc_ctl
3809 stq_p r25, ev5__bc_ctl(r14) // store to cbox ipr
3812 //orig update_bc_ctl_shadow r25, r16 // r25=value, r16-overwritten with adjusted impure ptr
3816 SAVE_SHADOW(r25,CNS_Q_BC_CTL,r16);
3845 //orig get_pmctr_ctl r8, r25 // pmctr_ctl bit in r8. adjusted impure pointer in r25
3846 mfpr r25, pt_impure
3847 lda r25, CNS_Q_IPR(r25)
3848 RESTORE_SHADOW(r8,CNS_Q_PM_CTL,r25);
3855 //orig store_reg1 pmctr_ctl, r14, r25, ipr=1 // update pmctr_ctl register
3856 //adjusted impure pointer still in r25
3857 SAVE_SHADOW(r14,CNS_Q_PM_CTL,r25);
3875 //orig get_pmctr_ctl r25, r25
3876 mfpr r25, pt_impure
3877 lda r25, CNS_Q_IPR(r25)
3878 RESTORE_SHADOW(r25,CNS_Q_PM_CTL,r25);
3895 sll r25, 6, r25 // shift frequency bits into pmctr_v_ctl positions
3911 and r25, r8, r12 //isolate frequency select bits for ctr0
3929 and r25, r8, r12 //isolate frequency select bits for ctr1
3946 and r25, r8, r12 //isolate frequency select bits for ctr2
3957 //orig get_pmctr_ctl r25, r12 // read pmctr ctl; r12=adjusted impure pointer
3960 RESTORE_SHADOW(r25,CNS_Q_PM_CTL,r12);
3964 bic r25, r8, r25 // clear out old ctl value
3965 or r25, r14, r14 // create new pmctr_ctl
3984 and r17, r8, r25 // isolate pmctr mode bits
3986 or r0, r25, r25 // or in new mode bits
3987 mtpr r25, ev5__pmctr
3992 lda r25, 1<<icsr_v_pma(r31) // set icsr<pma> if r17<0>=0
3993 bic r8, r25, r8 // clear old pma bit
3994 cmovlbs r17, r31, r25 // and clear icsr<pma> if r17<0>=1
3995 or r8, r25, r8
4048 and r17, r8, r25 // clear all but ctr fields
4049 or r25, r14, r14 // write ctr fields
4124 addq r17, r18, r25
4171 ldq_u r8, -1(r25)
4179 ldq_u r9, -1(r25)
4192 ldq_u r25, -1(r10)
4194 bic r25, r13, r25
4198 bis r9, r25, r9