Lines Matching refs:r2
148 // r2 = base of scratch area
1231 mfpr r2, pt_misc // get misc bits
1233 or r2, r0, r2 // set the bit
1235 mtpr r2, pt_misc // update the chip
1241 //orig restore_reg1 bc_config, r2, r3, ipr=1 // pass cns_bc_config in r2
1756 //orig store_reg 2 // save r2
1757 SAVE_GPR(r2,CNS_Q_GPR+0x10,r1) // Save r2
1766 // r2 has been saved
1774 mfpr r2, icsr // Get icsr
1776 bic r2, r0, r0 // ICSR with SDE clear
1850 mtpr r2, icsr // Restore original ICSR
1907 ldq_p r2, scCtl(r14)
1921 SAVE_SHADOW(r2,CNS_Q_SC_CTL,r1);
1937 or r31, 1, r2 // get a one
1938 sll r2, icsr_v_fpe, r2 // Shift it into ICSR<FPE> position
1939 or r2, r0, r0 // set FEN on
2089 bis zero, 1, r2 // Get a '1'
2090 or r2, (1<<(icsr_v_sde-icsr_v_fpe)), r2
2091 sll r2, icsr_v_fpe, r2 // Shift bits into position
2092 bis r2, r2, r0 // Set ICSR<SDE> and ICSR<FPE>
2242 ldah r2, (1<<(ICSR_V_SDE-16))(r31) // Get a one in SHADOW_ENABLE bit location
2243 bic r0, r2, r2 // ICSR with SDE clear
2244 mtpr r2, icsr // Turn off SDE - no palshadow rd/wr for 3 bubble cycles
2255 // Restore GPRs (r0, r2 are restored later, r1 and r3 are trashed) ...
2318 RESTORE_GPR(r2,CNS_Q_GPR+0x10,r1)
2559 br r2, CALL_PAL_SWPPAL_10_ // tis our buddy OSF
2567 CALL_PAL_SWPPAL_10_: ldl_p r3, 0(r2) // fetch target addr
2569 mfpr r2, pal_base // fetch pal base
2571 addq r2, r3, r3 // add pal base
2572 lda r2, 0x3FFF(r31) // get pal base checker mask
2574 and r3, r2, r2 // any funky bits set?
2575 cmpeq r2, 0, r0 //