Lines Matching refs:r12
111 // r12 local scratch
204 bis r11, r31, r12 // Save PS
212 bis r31, r31, r12 // Set new PS
229 bis r12, r31, r11 // update ps
292 subq r13, 0x11, r12 // Start to translate from EV5IPL->OSFIPL
294 srl r12, 1, r8 // 1d, 1e: ipl 6. 1f: ipl 7.
297 cmovge r9, r8, r12 // if .ge. 1d, then take shifted value
298 bis r12, r31, r11 // set new ps
300 mfpr r12, pt_intmask
306 extbl r12, r14, r14 // Translate new OSFIPL->EV5IPL
509 bis r11, r31, r12 // Save PS
517 bis r31, r31, r12 // Set new PS
543 bis r12, r31, r11 // update ps
578 bis r11, r31, r12 // Save PS
605 bis r31, r31, r12 // Set new PS
654 bis r11, r31, r12 // Save PS
662 bis r31, r31, r12 // Set new PS
681 bis r12, r31, r11 // update ps
708 and r11, osfps_m_mode, r12 // get mode bit
719 beq r12, TRAP_ARITH_10_ // if zero we are in kern now
733 mfpr r12, pt_entarith
750 mtpr r12, exc_addr // Set new PC - 1 bubble to hw_rei - E1
783 bis r11, r31, r12 // Save PS
790 bis r31, r31, r12 // Set new PS
805 bis r12, r31, r11 // set new ps
845 // r12 - new PS
865 bis r12, r31, r11 // update ps
1130 stq r12, osfsf_ps(sp) // save old ps
1165 and r12, osfps_m_ipl, r11 // clean ps
1166 mfpr r12, pt_intmask // get int mask
1168 extbl r12, r11, r12 // get mask for this ipl
1171 mtpr r12, ev5__ipl // set the new ipl.
1186 sll r12, icsr_v_fpe, r12 // shift new fen to pos
1191 or r25, r12, r25 // icsr with new fen
1195 sll r24, itb_asn_v_asn, r12
1205 mtpr r12, itb_asn // no hw_rei_stall in 0,1,2,3,4
1279 bis r11, r31, r12 // Save PS for stack write
1311 stq r12, osfsf_ps(sp) // save ps
1338 bis r11, r31, r12 // Save PS for stack write
1370 stq r12, osfsf_ps(sp) // save ps
1400 mfpr r12, pt6
1401 blbs r12, tnv_in_pal // Special handler if original faulting reference was in PALmode
1403 bis r12, r31, r14 // save PC in case of tbmiss or fault
1438 invalid_dpte_no_dismiss_10_: srl r8, osfpte_v_kre, r12 // get kre to <0>
1450 srl r12, osfpte_v_kwe-osfpte_v_kre, r25 // get write enable to <0>
1454 cmovlbs r13, r25, r12 // if write access move acv based on write enable
1466 cmovlbs r12, mmcsr_c_tnv, r17 // make p2 be tnv if access ok else acv
1480 mfpr r12, pt6
1481 addq r12, 4, r12 // bump pc to pc+4
1483 mtpr r12, exc_addr // and set entry point
1632 bis r11, r31, r12 // Save PS for stack write
1653 stq r12, osfsf_ps(sp) // save old ps
1681 mfpr r12, pt_pcbb // get pcbb
1685 stq_p r30, osfpcb_q_usp(r12) // store usp
1687 pal_update_pcb_10_: stq_p r30, osfpcb_q_ksp(r12) // store ksp
1691 stl_p r14, osfpcb_l_cc(r12) // save time
1794 SAVE_GPR(r12,CNS_Q_GPR+0x60,r1)
1862 SAVE_SHADOW(r12,CNS_Q_SHADOW+0x20,r1)
2229 RESTORE_SHADOW(r12,CNS_Q_SHADOW+0x20,r1)
2269 RESTORE_GPR(r12,CNS_Q_GPR+0x60,r1)
2372 mfpr r12, pt_misc // Get MCES and scratch
2373 zap r12, 0x3c, r12
2375 or r12, r25, r12 // Combine mchk code
2379 or r12, r25, r25 // Combine SCBv
2394 blbs r12, sys_double_machine_check // MCHK halt if double machine check
2421 mfpr r12, exc_addr // get PC
2422 subq r12, 4, r12 // Point to the HALT
2424 mtpr r12, exc_addr
2798 sll r16, icsr_v_fpe, r12 // shift new fen to correct bit position
2801 or r1, r12, r1 // Or new FEN into ICSR
2802 mfpr r12, pt_pcbb // Get PCBB - E1
2805 stl_p r16, osfpcb_q_fen(r12) // Store FEN in PCB.
2883 and r22, 1, r12 // isolate fen
3279 ldq r12, -6*8(r25) // get ps
3291 and r12, osfps_m_mode, r11 // get mode
3324 bis r11, r31, r12 // Save PS for stack write
3365 bis r11, r31, r12 // Save PS for stack write
3411 mfpr r12, pt_entsys // get address of callSys routine
3429 mtpr r12, exc_addr // set address
3591 mfpr r12, pt_pcbb // get pcb pointer
3592 stq_p r16, osfpcb_q_unique(r12)// get new value
3661 bis r11, r31, r12 // Save PS for stack write
3887 lda r12, 1<<icsr_v_pmp(r31) // pb
3888 bic r13, r12, r13 // clear pmp bit
3889 sll r16, icsr_v_pmp, r12 // move pme bit to icsr<pmp> position
3890 or r12, r13, r13 // new icsr with icsr<pmp> bit set/clear
3911 and r25, r8, r12 //isolate frequency select bits for ctr0
3913 or r14,r12,r14 // or in new ctl0 bits
3929 and r25, r8, r12 //isolate frequency select bits for ctr1
3931 or r14,r12,r14 // or in new ctl1 bits
3946 and r25, r8, r12 //isolate frequency select bits for ctr2
3948 or r14,r12,r14 // or in new ctl2 bits
3957 //orig get_pmctr_ctl r25, r12 // read pmctr ctl; r12=adjusted impure pointer
3958 mfpr r12, pt_impure
3959 lda r12, CNS_Q_IPR(r12)
3960 RESTORE_SHADOW(r25,CNS_Q_PM_CTL,r12);
3966 //orig store_reg1 pmctr_ctl, r14, r12, ipr=1
3967 SAVE_SHADOW(r14,CNS_Q_PM_CTL,r12); // r12 still has the adjusted impure ptr
3976 //orig get_pmctr_ctl r14, r12 // read shadow pmctr ctl; r12=adjusted impure pointer
3977 mfpr r12, pt_impure
3978 lda r12, CNS_Q_IPR(r12)
3979 RESTORE_SHADOW(r14,CNS_Q_PM_CTL,r12);
4006 //orig store_reg1 pmctr_ctl, r14, r12, ipr=1 // update pmctr_ctl register
4007 SAVE_SHADOW(r14,CNS_Q_PM_CTL,r12); // r12 still has the adjusted impure ptr
4012 //orig get_pmctr_ctl r14, r12 // read shadow pmctr ctl; r12=adjusted impure pointer
4013 mfpr r12, pt_impure
4014 lda r12, CNS_Q_IPR(r12)
4015 RESTORE_SHADOW(r14,CNS_Q_PM_CTL,r12);
4027 //orig store_reg1 pmctr_ctl, r14, r12, ipr=1 // update pmctr_ctl register
4028 SAVE_SHADOW(r14,CNS_Q_PM_CTL,r12); // r12 still has the adjusted impure ptr
4134 bis r8, r9, r12
4135 insql r12, r16, r12
4138 bis r12, r13, r12
4139 stq_u r12, 0(r16)
4152 extql r8, r17, r12
4155 bis r12, r13, r13
4161 extql r9, r17, r12
4163 bis r12, r13, r13
4185 lda r12, -1(r31)
4186 mskql r12, r18, r13
4187 cmovne r13, r13, r12
4188 insqh r12, r16, r13
4189 insql r12, r16, r12
4193 bic r14, r12, r14
4195 and r8, r12, r8