Lines Matching defs:address
178 // Return that this request's cache line address aliases with
184 // Create a default entry, mapping the address to NULL, the cast is
254 Sequencer::invalidateSC(Addr address)
256 AbstractCacheEntry *e = m_dataCache_ptr->lookup(address);
265 Sequencer::handleLlsc(Addr address, SequencerRequest* request)
267 AbstractCacheEntry *e = m_dataCache_ptr->lookup(address);
302 // Normal writes should clear the locked address
357 Sequencer::writeCallback(Addr address, DataBlock& data,
363 assert(address == makeLineAddress(address));
364 assert(m_writeRequestTable.count(makeLineAddress(address)));
366 RequestTable::iterator i = m_writeRequestTable.find(address);
391 success = handleLlsc(address, request);
394 // address variable here is assumed to be a line address, so when
398 // waiting on memory accesses for the specified address that go to
402 m_controller->blockOnQueue(address, m_mandatory_q_ptr);
404 m_controller->unblock(address);
412 Sequencer::readCallback(Addr address, DataBlock& data,
418 assert(address == makeLineAddress(address));
419 assert(m_readRequestTable.count(makeLineAddress(address)));
421 RequestTable::iterator i = m_readRequestTable.find(address);
698 Sequencer::evictionCallback(Addr address)
700 ruby_eviction_callback(address);