src/gpu-compute/wavefront.cc

893             uint32_t regVal = computeUnit->vrf[simdId]->
895             *(uint32_t *)iter = regVal; iter += sizeof(regVal);
902             uint64_t regVal = computeUnit->vrf[simdId]->
904             *(uint64_t *)iter = regVal; iter += sizeof(regVal);
910             uint64_t regVal = condRegState->read<uint64_t>(i, lane);
911             *(uint64_t *)iter = regVal; iter += sizeof(regVal);
954             uint32_t regVal = *(uint32_t *)iter; iter += sizeof(regVal);
955             computeUnit->vrf[simdId]->write<uint32_t>(vgprIdx, regVal, lane);
962             uint64_t regVal = *(uint64_t *)iter; iter += sizeof(regVal);
963             computeUnit->vrf[simdId]->write<uint64_t>(vgprIdx, regVal, lane);
969             uint64_t regVal = *(uint64_t *)iter; iter += sizeof(regVal);
970             condRegState->write<uint64_t>(i, lane, regVal);