Lines Matching refs:virt_page_addr
1038 Addr virt_page_addr = roundDown(pkt->req->getVaddr(),
1048 virt_page_addr);
1055 updatePageFootprint(virt_page_addr);
1097 new TLBEvent(this, virt_page_addr, lookup_outcome, pkt);
1099 if (translationReturnEvent.count(virt_page_addr)) {
1101 virt_page_addr);
1104 translationReturnEvent[virt_page_addr] = tlb_event;
1159 GpuTLB::handleTranslationReturn(Addr virt_page_addr, tlbOutcome tlb_outcome,
1190 virt_page_addr);
1192 local_entry = insert(virt_page_addr, *new_entry);
1227 cleanupQueue.push(virt_page_addr);
1438 Addr virt_page_addr = roundDown(vaddr, TheISA::PageBytes);
1441 virt_page_addr);
1443 local_entry = insert(virt_page_addr, *new_entry);
1488 Addr virt_page_addr = roundDown(pkt->req->getVaddr(),
1492 tlb->updatePageFootprint(virt_page_addr);
1521 virt_page_addr);
1528 assert(alignedVaddr == virt_page_addr);
1547 new TlbEntry(p->pid(), virt_page_addr,
1559 new TlbEntry(p->pid(), virt_page_addr,
1617 Addr virt_page_addr = roundDown(pkt->req->getVaddr(),
1620 DPRINTF(GPUTLB, "MemSidePort recvTiming for virt_page_addr %#x\n",
1621 virt_page_addr);
1623 TLBEvent *tlb_event = tlb->translationReturnEvent[virt_page_addr];
1625 assert(virt_page_addr == tlb_event->getTLBEventVaddr());
1666 GpuTLB::updatePageFootprint(Addr virt_page_addr)
1678 ret = TLBFootprint.insert(AccessPatternTable::value_type(virt_page_addr,