Lines Matching defs:entry

157     GpuTLB::insert(Addr vpn, TlbEntry &entry)
175 *newEntry = entry;
191 auto entry = entryList[set].begin();
192 for (; entry != entryList[set].end(); ++entry) {
193 int page_size = (*entry)->size();
195 if ((*entry)->vaddr <= va && (*entry)->vaddr + page_size > va) {
196 DPRINTF(GPUTLB, "Matched vaddr %#x to entry starting at %#x "
197 "with size %#x.\n", va, (*entry)->vaddr, page_size);
200 entryList[set].push_front(*entry);
201 entryList[set].erase(entry);
202 entry = entryList[set].begin();
209 return entry;
217 auto entry = lookupIt(va, update_lru);
219 if (entry == entryList[set].end())
222 return *entry;
232 TlbEntry *entry = entryList[i].front();
234 freeList[i].push_back(entry);
268 auto entry = lookupIt(va, false);
270 if (entry != entryList[set].end()) {
271 freeList[set].push_back(*entry);
272 entryList[set].erase(entry);
675 TlbEntry *entry = lookup(vaddr, true);
677 if (entry)
689 if (!entry) {
783 TlbEntry *entry = lookup(vaddr);
786 if (!entry) {
823 entry = insert(alignedVaddr, gpuEntry);
841 bool badWrite = (!entry->writable && (inUser || cr0.wp));
843 if ((inUser && !entry->user) || (mode == BaseTLB::Write &&
862 "checks.\n", entry->paddr);
864 int page_size = entry->size();
865 Addr paddr = entry->paddr | (vaddr & (page_size - 1));
869 if (entry->uncacheable)
1067 // Put the entry in SenderState
1068 TlbEntry *entry = lookup(tmp_req->getVaddr(), false);
1069 assert(entry);
1073 new TlbEntry(p->pid(), entry->vaddr, entry->paddr,
1077 // the reqCnt has an entry per level, so its size tells us
1189 DPRINTF(GPUTLB, "allocating entry w/ addr %#x\n",
1404 * It updates LRU, inserts the TLB entry on a miss
1440 DPRINTF(GPUTLB, "allocating entry w/ addr %#x\n",
1552 // TLB entry back so that it can be figured out as empty and
1575 TlbEntry *entry = tlb->lookup(pkt->req->getVaddr(),
1578 assert(entry);
1582 new TlbEntry(p->pid(), entry->vaddr, entry->paddr,