src/gpu-compute/compute_unit.hh

43 #include <vector>
111     std::vector<std::vector<Wavefront*>> readyList;
119     std::vector<std::vector<std::pair<Wavefront*, WAVE_STATUS>>> waveStatusList;
131     std::vector<std::pair<Wavefront*, DISPATCH_STATUS>> dispatchList;
136     std::vector<std::vector<Wavefront*>> wfList;
139     // array of vector register files, one per SIMD
140     std::vector<VectorRegisterFile*> vrf;
141     // Number of vector ALU units (SIMDs) in CU
144     // precision vector instruction inside the vector ALU pipeline
147     // precision vector instruction inside the vector ALU pipeline
155     // tracks the last cycle a vector instruction was executed on a SIMD
156     std::vector<uint64_t> lastExecCycle;
165     std::vector<Addr> lastVaddrCU;
166     std::vector<std::vector<Addr>> lastVaddrSimd;
167     std::vector<std::vector<std::vector<Addr>>> lastVaddrWF;
188     // vector of Vector ALU (MACC) pipelines
189     std::vector<WaitClass> aluPipe;
191     std::vector<WaitClass> wfWait;
194     std::vector<WaitClass> vrfToGlobalMemPipeBus;
196     std::vector<WaitClass> vrfToLocalMemPipeBus;
206     uint32_t numCyclesPerStoreTransfer;  // number of cycles per vector store
207     uint32_t numCyclesPerLoadTransfer;  // number of cycles per vector load
212     // number of vector registers being reserved for each SIMD unit
213     std::vector<int> vectorRegsReserved;
214     // number of vector registers per SIMD unit
217     std::vector<std::pair<uint32_t, uint32_t> > regIdxVec;
218     std::vector<uint64_t> timestampVec;
219     std::vector<uint8_t>  statusVec;
354     // number of individual vector operations executed
358     Stats::Formula vpc; // vector ops per cycle
359     Stats::Formula ipc; // vector instructions per cycle
363     // number of vector ALU instructions received
370     // flag per vector SIMD unit that is set when there is at least one
371     // WV that has a vector ALU instruction as the oldest in its
374     std::vector<bool> vectorAluInstAvail;
686     std::vector<DataPort*> memPort;
688     std::vector<DTLBPort*> tlbPort;