Lines Matching defs:reg
216 uint32_t ® = *pkt->getPtr<uint32_t>();
221 reg = regs.command;
223 reg &= ~(CR_RXD | CR_TXD | CR_TXR | CR_RXR);
227 reg = regs.config;
231 reg = regs.mear;
235 reg = regs.ptscr;
239 reg = regs.isr;
244 reg = regs.imr;
248 reg = regs.ier;
252 reg = regs.ihr;
256 reg = regs.txdp;
260 reg = regs.txdp_hi;
264 reg = regs.txcfg;
268 reg = regs.gpior;
272 reg = regs.rxdp;
276 reg = regs.rxdp_hi;
280 reg = regs.rxcfg;
284 reg = regs.pqcr;
288 reg = regs.wcsr;
292 reg = regs.pcr;
301 reg = regs.rfcr;
309 reg = rom.perfectMatch[1];
310 reg = reg << 8;
311 reg += rom.perfectMatch[0];
314 reg = rom.perfectMatch[3] << 8;
315 reg += rom.perfectMatch[2];
318 reg = rom.perfectMatch[5] << 8;
319 reg += rom.perfectMatch[4];
330 reg = rom.filterHash[rfaddr - FHASH_ADDR + 1] << 8;
331 reg += rom.filterHash[rfaddr - FHASH_ADDR];
341 reg = regs.srr;
345 reg = regs.mibc;
346 reg &= ~(MIBC_MIBS | MIBC_ACLR);
350 reg = regs.vrcr;
354 reg = regs.vtcr;
358 reg = regs.vdr;
362 reg = regs.ccsr;
366 reg = regs.tbicr;
370 reg = regs.tbisr;
374 reg = regs.tanar;
378 reg = regs.tanlpar;
382 reg = regs.taner;
386 reg = regs.tesr;
390 reg = 0;
392 reg |= M5REG_RX_THREAD;
394 reg |= M5REG_TX_THREAD;
396 reg |= M5REG_RSS;
404 daddr, reg, reg);
427 uint32_t reg = pkt->getLE<uint32_t>();
430 DPRINTF(EthernetPIO, "write data=%d data=%#x\n", reg, reg);
434 regs.command = reg;
435 if (reg & CR_TXD) {
437 } else if (reg & CR_TXE) {
445 if (reg & CR_RXD) {
447 } else if (reg & CR_RXE) {
454 if (reg & CR_TXR)
457 if (reg & CR_RXR)
460 if (reg & CR_SWI)
463 if (reg & CR_RST) {
472 if (reg & CFGR_LNKSTS ||
473 reg & CFGR_SPDSTS ||
474 reg & CFGR_DUPSTS ||
475 reg & CFGR_RESERVED ||
476 reg & CFGR_T64ADDR ||
477 reg & CFGR_PCI64_DET) {
483 regs.config |= reg & ~(CFGR_LNKSTS | CFGR_SPDSTS | CFGR_DUPSTS |
488 if (reg & CFGR_AUTO_1000)
491 if (reg & CFGR_PCI64_DET)
494 if (reg & CFGR_EXTSTS_EN)
504 regs.mear |= reg & ~MEAR_EEDO;
508 if (reg & MEAR_EESEL) {
510 if (reg & MEAR_EECLK && !eepromClk)
518 eepromClk = reg & MEAR_EECLK;
524 regs.ptscr = reg & ~(PTSCR_RBIST_RDONLY);
527 if (reg & PTSCR_RBIST_EN)
529 if (reg & PTSCR_EEBIST_EN)
531 if (reg & PTSCR_EELOAD_EN)
539 regs.imr = reg;
544 regs.ier = reg;
548 regs.ihr = reg;
553 regs.txdp = (reg & 0xFFFFFFFC);
559 regs.txdp_hi = reg;
563 regs.txcfg = reg;
576 regs.gpior |= reg & ~(GPIOR_UNUSED | GPIOR_GP5_IN | GPIOR_GP4_IN
582 regs.rxdp = reg;
587 regs.rxdp_hi = reg;
591 regs.rxcfg = reg;
596 regs.pqcr = reg;
601 regs.wcsr = reg;
606 regs.pcr = reg;
610 regs.rfcr = reg;
612 rxFilterEnable = (reg & RFCR_RFEN) ? true : false;
613 acceptBroadcast = (reg & RFCR_AAB) ? true : false;
614 acceptMulticast = (reg & RFCR_AAM) ? true : false;
615 acceptUnicast = (reg & RFCR_AAU) ? true : false;
616 acceptPerfect = (reg & RFCR_APM) ? true : false;
617 acceptArp = (reg & RFCR_AARP) ? true : false;
618 multicastHashEnable = (reg & RFCR_MHEN) ? true : false;
620 if (reg & RFCR_UHEN)
623 if (reg & RFCR_ULM)
632 rom.perfectMatch[0] = (uint8_t)reg;
633 rom.perfectMatch[1] = (uint8_t)(reg >> 8);
636 rom.perfectMatch[2] = (uint8_t)reg;
637 rom.perfectMatch[3] = (uint8_t)(reg >> 8);
640 rom.perfectMatch[4] = (uint8_t)reg;
641 rom.perfectMatch[5] = (uint8_t)(reg >> 8);
652 rom.filterHash[rfaddr - FHASH_ADDR] = (uint8_t)reg;
654 = (uint8_t)(reg >> 8);
663 regs.brar = reg;
676 regs.vrcr = reg;
680 regs.vtcr = reg;
688 regs.ccsr = reg;
692 regs.tbicr = reg;
693 if (reg & TBICR_MR_LOOPBACK)
696 if (reg & TBICR_MR_AN_ENABLE) {
709 regs.tanar |= reg & ~(TANAR_RF1 | TANAR_RF2 | TANAR_UNUSED);
721 regs.tesr = reg;