Lines Matching defs:asid
289 SMMUTLB::invalidateVA(Addr va, uint16_t asid, uint16_t vmid)
297 e.asid==asid && e.vmid==vmid)
318 SMMUTLB::invalidateASID(uint16_t asid, uint16_t vmid)
326 if (e.asid==asid && e.vmid==vmid)
459 ARMArchTLB::lookup(Addr va, uint16_t asid, uint16_t vmid, bool updStats)
463 Set &set = sets[pickSetIdx(va, asid, vmid)];
469 e.asid==asid && e.vmid==vmid)
500 lookup(incoming.va, incoming.asid, incoming.vmid, false);
505 Set &set = sets[pickSetIdx(incoming.va, incoming.asid, incoming.vmid)];
513 ARMArchTLB::invalidateVA(Addr va, uint16_t asid, uint16_t vmid)
515 Set &set = sets[pickSetIdx(va, asid, vmid)];
521 e.asid==asid && e.vmid==vmid)
544 ARMArchTLB::invalidateASID(uint16_t asid, uint16_t vmid)
552 if (e.asid==asid && e.vmid==vmid)
585 ARMArchTLB::pickSetIdx(Addr va, uint16_t asid, uint16_t vmid) const
587 return ((va >> 12) ^ asid ^ vmid) % sets.size();
1015 uint16_t asid, uint16_t vmid,
1027 e.asid==asid && e.vmid==vmid && e.stage==stage && e.level==level)
1068 incoming.asid, incoming.vmid,
1086 WalkCache::invalidateVA(Addr va, uint16_t asid, uint16_t vmid,
1096 && e.asid == asid && e.vmid == vmid)
1123 WalkCache::invalidateASID(uint16_t asid, uint16_t vmid)
1131 if (e.asid==asid && e.vmid==vmid)