dev/arm/gic_v3_redistributor.cc

96         for (int i = 0, int_id = first_intid; i < size; i++, int_id++) {
97             uint8_t prio = irqPriority[int_id];
100                 if (getIntGroup(int_id) != Gicv3::G1NS) {
220           for (int int_id = 0; int_id < 8 * size; int_id++) {
221               value |= (irqGroup[int_id] << int_id);
231           for (int int_id = 0; int_id < 8 * size; int_id++) {
234                   if (getIntGroup(int_id) != Gicv3::G1NS) {
239               if (irqEnabled[int_id]) {
240                   value |= (1 << int_id);
251           for (int int_id = 0; int_id < 8 * size; int_id++) {
254                   if (getIntGroup(int_id) != Gicv3::G1NS) {
259               value |= (irqPending[int_id] << int_id);
269           for (int int_id = 0; int_id < 8 * size; int_id++) {
272                   if (getIntGroup(int_id) != Gicv3::G1NS) {
277               value |=  irqActive[int_id] << int_id;
288           for (int i = 0, int_id = first_int_id; i < 32;
289                i = i + 2, int_id++) {
292                   if (getIntGroup(int_id) != Gicv3::G1NS) {
297               if (irqConfig[int_id] == Gicv3::INT_EDGE_TRIGGERED) {
315                   for (int int_id = 0; int_id < 8 * size; int_id++) {
316                       value |= irqGrpmod[int_id] << int_id;
335                   for (int i = 0, int_id = 0; i < 8 * size;
336                        i = i + 2, int_id++) {
337                       value |= irqNsacr[int_id] << i;
391         for (int i = 0, int_id = first_intid; i < size; i++, int_id++) {
395                 if (getIntGroup(int_id) != Gicv3::G1NS) {
404             irqPriority[int_id] = prio;
406                     "int_id %d priority %d\n", int_id, irqPriority[int_id]);
446         for (int int_id = 0; int_id < 8 * size; int_id++) {
447             irqGroup[int_id] = data & (1 << int_id) ? 1 : 0;
449                     "int_id %d group %d\n", int_id, irqGroup[int_id]);
455         for (int int_id = 0; int_id < 8 * size; int_id++) {
458                 if (getIntGroup(int_id) != Gicv3::G1NS) {
463             bool enable = data & (1 << int_id) ? 1 : 0;
466                 irqEnabled[int_id] = true;
470                     "int_id %d enable %i\n", int_id, irqEnabled[int_id]);
476         for (int int_id = 0; int_id < 8 * size; int_id++) {
479                 if (getIntGroup(int_id) != Gicv3::G1NS) {
484             bool disable = data & (1 << int_id) ? 1 : 0;
487                 irqEnabled[int_id] = false;
491                     "int_id %d enable %i\n", int_id, irqEnabled[int_id]);
497         for (int int_id = 0; int_id < 8 * size; int_id++) {
500                 if (getIntGroup(int_id) != Gicv3::G1NS) {
505             bool pending = data & (1 << int_id) ? 1 : 0;
509                         "(GICR_ISPENDR0): int_id %d (PPI) "
510                         "pending bit set\n", int_id);
511                 irqPending[int_id] = true;
519         for (int int_id = 0; int_id < 8 * size; int_id++) {
522                 if (getIntGroup(int_id) != Gicv3::G1NS) {
527             bool clear = data & (1 << int_id) ? 1 : 0;
530                 irqPending[int_id] = false;
537         for (int int_id = 0; int_id < 8 * size; int_id++) {
540                 if (getIntGroup(int_id) != Gicv3::G1NS) {
545             bool activate = data & (1 << int_id) ? 1 : 0;
548                 if (!irqActive[int_id]) {
550                             "int_id %d active set\n", int_id);
553                 irqActive[int_id] = true;
560         for (int int_id = 0; int_id < 8 * size; int_id++) {
563                 if (getIntGroup(int_id) != Gicv3::G1NS) {
568             bool clear = data & (1 << int_id) ? 1 : 0;
571                 if (irqActive[int_id]) {
573                             "int_id %d active cleared\n", int_id);
576                 irqActive[int_id] = false;
585           for (int i = 0, int_id = first_intid; i < 8 * size;
586                i = i + 2, int_id++) {
589                   if (getIntGroup(int_id) != Gicv3::G1NS) {
594               irqConfig[int_id] = data & (0x2 << i) ?
598                       "int_id %d (PPI) config %d\n",
599                       int_id, irqConfig[int_id]);
609               for (int int_id = 0; int_id < 8 * size; int_id++) {
615                   irqGrpmod[int_id] = data & (1 << int_id);
629                   for (int i = 0, int_id = 0; i < 8 * size;
630                        i = i + 2, int_id++) {
631                       irqNsacr[int_id] = (data >> i) & 0x3;
705 Gicv3Redistributor::sendPPInt(uint32_t int_id)
707     assert((int_id >= Gicv3::SGI_MAX) &&
708            (int_id < Gicv3::SGI_MAX + Gicv3::PPI_MAX));
709     irqPending[int_id] = true;
711             "int_id %d (PPI) pending bit set\n", int_id);
716 Gicv3Redistributor::sendSGI(uint32_t int_id, Gicv3::GroupId group, bool ns)
718     assert(int_id < Gicv3::SGI_MAX);
719     Gicv3::GroupId int_group = getIntGroup(int_id);
725         int nsaccess = irqNsacr[int_id];
746     irqPending[int_id] = true;
748             "int_id %d (SGI) pending bit set\n", int_id);
753 Gicv3Redistributor::intStatus(uint32_t int_id) const
755     assert(int_id < Gicv3::SGI_MAX + Gicv3::PPI_MAX);
757     if (irqPending[int_id]) {
758         if (irqActive[int_id]) {
763     } else if (irqActive[int_id]) {
783     for (int int_id = 0; int_id < Gicv3::SGI_MAX + Gicv3::PPI_MAX; int_id++) {
784         Gicv3::GroupId int_group = getIntGroup(int_id);
787         if (irqPending[int_id] && irqEnabled[int_id] &&
788                 !irqActive[int_id] && group_enabled) {
789             if ((irqPriority[int_id] < cpuInterface->hppi.prio) ||
795                 (irqPriority[int_id] == cpuInterface->hppi.prio &&
796                  int_id < cpuInterface->hppi.intid)) {
797                 cpuInterface->hppi.intid = int_id;
798                 cpuInterface->hppi.prio = irqPriority[int_id];
942 Gicv3Redistributor::getIntGroup(int int_id) const
944     assert(int_id < (Gicv3::SGI_MAX + Gicv3::PPI_MAX));
947         if (irqGroup[int_id] == 0) {
953         if (irqGrpmod[int_id] == 0 && irqGroup[int_id] == 0) {
955         } else if (irqGrpmod[int_id] == 0 && irqGroup[int_id] == 1) {
957         } else if (irqGrpmod[int_id] == 1 && irqGroup[int_id] == 0) {
959         } else if (irqGrpmod[int_id] == 1 && irqGroup[int_id] == 1) {
968 Gicv3Redistributor::activateIRQ(uint32_t int_id)
970     irqPending[int_id] = false;
971     irqActive[int_id] = true;
975 Gicv3Redistributor::deactivateIRQ(uint32_t int_id)
977     irqActive[int_id] = false;