Lines Matching defs:arch_reg

116      * @param arch_reg The architectural register to remap.
120 RenameInfo rename(const RegId& arch_reg);
124 * @param arch_reg The architectural register to look up.
127 PhysRegIdPtr lookup(const RegId& arch_reg) const
129 assert(arch_reg.flatIndex() <= map.size());
130 return map[arch_reg.flatIndex()];
136 * @param arch_reg The architectural register to remap.
139 void setEntry(const RegId& arch_reg, PhysRegIdPtr phys_reg)
141 assert(arch_reg.flatIndex() <= map.size());
142 map[arch_reg.flatIndex()] = phys_reg;
225 * @param arch_reg The architectural register id to remap.
229 RenameInfo rename(const RegId& arch_reg)
231 switch (arch_reg.classValue()) {
233 return intMap.rename(arch_reg);
235 return floatMap.rename(arch_reg);
238 return vecMap.rename(arch_reg);
241 return vecElemMap.rename(arch_reg);
243 return predMap.rename(arch_reg);
245 return ccMap.rename(arch_reg);
249 PhysRegIdPtr phys_reg = lookup(arch_reg);
257 arch_reg.className());
265 * @param arch_reg The architectural register to look up.
268 PhysRegIdPtr lookup(const RegId& arch_reg) const
270 switch (arch_reg.classValue()) {
272 return intMap.lookup(arch_reg);
275 return floatMap.lookup(arch_reg);
279 return vecMap.lookup(arch_reg);
283 return vecElemMap.lookup(arch_reg);
286 return predMap.lookup(arch_reg);
289 return ccMap.lookup(arch_reg);
294 return regFile->getMiscRegId(arch_reg.flatIndex());
298 arch_reg.className());
307 * @param arch_reg The architectural register to remap.
310 void setEntry(const RegId& arch_reg, PhysRegIdPtr phys_reg)
312 switch (arch_reg.classValue()) {
315 return intMap.setEntry(arch_reg, phys_reg);
319 return floatMap.setEntry(arch_reg, phys_reg);
324 return vecMap.setEntry(arch_reg, phys_reg);
329 return vecElemMap.setEntry(arch_reg, phys_reg);
333 return predMap.setEntry(arch_reg, phys_reg);
337 return ccMap.setEntry(arch_reg, phys_reg);
344 assert(phys_reg == lookup(arch_reg));
349 arch_reg.className());