Lines Matching refs:LSQUnit

58 #include "debug/LSQUnit.hh"
64 LSQUnit<Impl>::WritebackEvent::WritebackEvent(const DynInstPtr &_inst,
65 PacketPtr _pkt, LSQUnit *lsq_ptr)
75 LSQUnit<Impl>::WritebackEvent::process()
88 LSQUnit<Impl>::WritebackEvent::description() const
95 LSQUnit<Impl>::recvTimingResp(PacketPtr pkt)
113 LSQUnit<Impl>::completeDataAccess(PacketPtr pkt)
146 LSQUnit<Impl>::LSQUnit(uint32_t lqEntries, uint32_t sqEntries)
156 LSQUnit<Impl>::init(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params,
166 DPRINTF(LSQUnit, "Creating LSQUnit%i object.\n",lsqID);
178 LSQUnit<Impl>::resetState()
195 LSQUnit<Impl>::name() const
206 LSQUnit<Impl>::regStats()
251 LSQUnit<Impl>::setDcachePort(MasterPort *dcache_port)
258 LSQUnit<Impl>::drainSanityCheck() const
269 LSQUnit<Impl>::takeOverFrom()
276 LSQUnit<Impl>::insert(const DynInstPtr &inst)
293 LSQUnit<Impl>::insertLoad(const DynInstPtr &load_inst)
298 DPRINTF(LSQUnit, "Inserting load PC %s, idx:%i [sn:%lli]\n",
316 LSQUnit<Impl>::insertStore(const DynInstPtr& store_inst)
322 DPRINTF(LSQUnit, "Inserting store PC %s, idx:%i [sn:%lli]\n",
337 LSQUnit<Impl>::getMemDepViolator()
348 LSQUnit<Impl>::numFreeLoadEntries()
352 DPRINTF(LSQUnit, "LQ size: %d, #loads occupied: %d\n",
359 LSQUnit<Impl>::numFreeStoreEntries()
363 DPRINTF(LSQUnit, "SQ size: %d, #stores occupied: %d\n",
371 LSQUnit<Impl>::checkSnoop(PacketPtr pkt)
376 DPRINTF(LSQUnit, "Got snoop for address %#x\n", pkt->getAddr());
412 DPRINTF(LSQUnit, "-- inst [sn:%lli] to pktAddr:%#x\n",
424 DPRINTF(LSQUnit, "Conflicting load at addr %#x [sn:%lli]\n",
430 DPRINTF(LSQUnit, "HitExternal Snoop for addr %#x [sn:%lli]\n",
451 LSQUnit<Impl>::checkViolations(typename LoadQueue::iterator& loadIt,
481 DPRINTF(LSQUnit, "Detected fault with inst [sn:%lli] "
498 DPRINTF(LSQUnit, "Found possible load violation at addr: %#x"
508 DPRINTF(LSQUnit, "Detected fault with inst [sn:%lli] and "
532 LSQUnit<Impl>::executeLoad(const DynInstPtr &inst)
538 DPRINTF(LSQUnit, "Executing load PC %s, [sn:%lli]\n",
576 DPRINTF(LSQUnit, "Load [sn:%lli] not executed from %s\n",
600 LSQUnit<Impl>::executeStore(const DynInstPtr &store_inst)
608 DPRINTF(LSQUnit, "Executing store PC %s [sn:%lli]\n",
624 DPRINTF(LSQUnit, "Store [sn:%lli] not executed from predication\n",
631 DPRINTF(LSQUnit,"Fault on Store PC %s, [sn:%lli], Size = 0\n",
653 LSQUnit<Impl>::commitLoad()
657 DPRINTF(LSQUnit, "Committing head load instruction, PC %s\n",
668 LSQUnit<Impl>::commitLoads(InstSeqNum &youngest_inst)
680 LSQUnit<Impl>::commitStores(InstSeqNum &youngest_inst)
693 DPRINTF(LSQUnit, "Marking store as able to write back, PC "
707 LSQUnit<Impl>::writebackBlockedStore()
718 LSQUnit<Impl>::writebackStores()
721 DPRINTF(LSQUnit, "Writing back blocked store\n");
733 DPRINTF(LSQUnit, "Unable to write back any more stores, cache"
783 DPRINTF(LSQUnit, "D-Cache: Writing back store idx:%i PC:%s "
803 DPRINTF(LSQUnit, "Store conditional [sn:%lli] failed. "
838 DPRINTF(LSQUnit, "D-Cache became blocked when writing [sn:%lli], "
848 LSQUnit<Impl>::squash(const InstSeqNum &squashed_num)
850 DPRINTF(LSQUnit, "Squashing until [sn:%lli]!"
855 DPRINTF(LSQUnit,"Load Instruction PC %s squashed, "
887 DPRINTF(LSQUnit,"Store Instruction PC %s squashed, "
917 LSQUnit<Impl>::storePostSend()
921 DPRINTF(LSQUnit, "Unstalling, stalling store [sn:%lli] "
949 LSQUnit<Impl>::writeback(const DynInstPtr &inst, PacketPtr pkt)
976 DPRINTF(LSQUnit, "Not completing instruction [sn:%lli] access "
992 LSQUnit<Impl>::completeStore(typename StoreQueue::iterator store_idx)
1017 DPRINTF(LSQUnit, "Completing store [sn:%lli], idx:%i, store head "
1030 DPRINTF(LSQUnit, "Unstalling, stalling store [sn:%lli] "
1057 LSQUnit<Impl>::trySendPacket(bool isLoad, PacketPtr data_pkt)
1097 LSQUnit<Impl>::recvRetry()
1100 DPRINTF(LSQUnit, "Receiving retry: blocked store\n");
1107 LSQUnit<Impl>::dumpInsts() const
1132 LSQUnit<Impl>::cacheLineSize()