cpu/o3/dyn_inst.hh

157         for (int idx = 0; idx < _numDestMiscRegs; idx++) {
158             if (_destMiscRegIdx[idx] == misc_reg) {
159                _destMiscRegVal[idx] = val;
174     readMiscRegOperand(const StaticInst *si, int idx) override
176         const RegId& reg = si->srcRegIdx(idx);
185     setMiscRegOperand(const StaticInst *si, int idx, RegVal val) override
187         const RegId& reg = si->destRegIdx(idx);
213         for (int idx = 0; idx < this->numDestRegs(); idx++) {
214             PhysRegIdPtr prev_phys_reg = this->prevDestRegIdx(idx);
216                 this->staticInst->destRegIdx(idx);
219                 this->setIntRegOperand(this->staticInst.get(), idx,
223                 this->setFloatRegOperandBits(this->staticInst.get(), idx,
227                 this->setVecRegOperand(this->staticInst.get(), idx,
231                 this->setVecElemOperand(this->staticInst.get(), idx,
235                 this->setVecPredRegOperand(this->staticInst.get(), idx,
239                 this->setCCRegOperand(this->staticInst.get(), idx,
271     readIntRegOperand(const StaticInst *si, int idx) override
273         return this->cpu->readIntReg(this->_srcRegIdx[idx]);
277     readFloatRegOperandBits(const StaticInst *si, int idx) override
279         return this->cpu->readFloatReg(this->_srcRegIdx[idx]);
283     readVecRegOperand(const StaticInst *si, int idx) const override
285         return this->cpu->readVecReg(this->_srcRegIdx[idx]);
292     getWritableVecRegOperand(const StaticInst *si, int idx) override
294         return this->cpu->getWritableVecReg(this->_destRegIdx[idx]);
301     readVec8BitLaneOperand(const StaticInst *si, int idx) const override
303         return cpu->template readVecLane<uint8_t>(_srcRegIdx[idx]);
308     readVec16BitLaneOperand(const StaticInst *si, int idx) const override
310         return cpu->template readVecLane<uint16_t>(_srcRegIdx[idx]);
315     readVec32BitLaneOperand(const StaticInst *si, int idx) const override
317         return cpu->template readVecLane<uint32_t>(_srcRegIdx[idx]);
322     readVec64BitLaneOperand(const StaticInst *si, int idx) const override
324         return cpu->template readVecLane<uint64_t>(_srcRegIdx[idx]);
330     setVecLaneOperandT(const StaticInst *si, int idx, const LD& val)
332         return cpu->template setVecLane(_destRegIdx[idx], val);
335     setVecLaneOperand(const StaticInst *si, int idx,
338         return setVecLaneOperandT(si, idx, val);
341     setVecLaneOperand(const StaticInst *si, int idx,
344         return setVecLaneOperandT(si, idx, val);
347     setVecLaneOperand(const StaticInst *si, int idx,
350         return setVecLaneOperandT(si, idx, val);
353     setVecLaneOperand(const StaticInst *si, int idx,
356         return setVecLaneOperandT(si, idx, val);
360     VecElem readVecElemOperand(const StaticInst *si, int idx) const override
362         return this->cpu->readVecElem(this->_srcRegIdx[idx]);
366     readVecPredRegOperand(const StaticInst *si, int idx) const override
368         return this->cpu->readVecPredReg(this->_srcRegIdx[idx]);
372     getWritableVecPredRegOperand(const StaticInst *si, int idx) override
374         return this->cpu->getWritableVecPredReg(this->_destRegIdx[idx]);
378     readCCRegOperand(const StaticInst *si, int idx) override
380         return this->cpu->readCCReg(this->_srcRegIdx[idx]);
387     setIntRegOperand(const StaticInst *si, int idx, RegVal val) override
389         this->cpu->setIntReg(this->_destRegIdx[idx], val);
390         BaseDynInst<Impl>::setIntRegOperand(si, idx, val);
394     setFloatRegOperandBits(const StaticInst *si, int idx, RegVal val) override
396         this->cpu->setFloatReg(this->_destRegIdx[idx], val);
397         BaseDynInst<Impl>::setFloatRegOperandBits(si, idx, val);
401     setVecRegOperand(const StaticInst *si, int idx,
404         this->cpu->setVecReg(this->_destRegIdx[idx], val);
405         BaseDynInst<Impl>::setVecRegOperand(si, idx, val);
408     void setVecElemOperand(const StaticInst *si, int idx,
411         int reg_idx = idx;
413         BaseDynInst<Impl>::setVecElemOperand(si, idx, val);
417     setVecPredRegOperand(const StaticInst *si, int idx,
420         this->cpu->setVecPredReg(this->_destRegIdx[idx], val);
421         BaseDynInst<Impl>::setVecPredRegOperand(si, idx, val);
424     void setCCRegOperand(const StaticInst *si, int idx, RegVal val) override
426         this->cpu->setCCReg(this->_destRegIdx[idx], val);
427         BaseDynInst<Impl>::setCCRegOperand(si, idx, val);