Lines Matching refs:ridx
244 for (RegIndex ridx = 0; ridx < TheISA::NumIntRegs; ++ridx) {
248 renameMap[tid].setEntry(RegId(IntRegClass, ridx), phys_reg);
249 commitRenameMap[tid].setEntry(RegId(IntRegClass, ridx), phys_reg);
252 for (RegIndex ridx = 0; ridx < TheISA::NumFloatRegs; ++ridx) {
254 renameMap[tid].setEntry(RegId(FloatRegClass, ridx), phys_reg);
256 RegId(FloatRegClass, ridx), phys_reg);
264 for (RegIndex ridx = 0; ridx < TheISA::NumVecRegs; ++ridx) {
265 RegId rid = RegId(VecRegClass, ridx);
272 for (RegIndex ridx = 0; ridx < TheISA::NumVecRegs; ++ridx) {
275 RegId lrid = RegId(VecElemClass, ridx, ldx);
283 for (RegIndex ridx = 0; ridx < TheISA::NumVecPredRegs; ++ridx) {
285 renameMap[tid].setEntry(RegId(VecPredRegClass, ridx), phys_reg);
287 RegId(VecPredRegClass, ridx), phys_reg);
290 for (RegIndex ridx = 0; ridx < TheISA::NumCCRegs; ++ridx) {
292 renameMap[tid].setEntry(RegId(CCRegClass, ridx), phys_reg);
293 commitRenameMap[tid].setEntry(RegId(CCRegClass, ridx), phys_reg);