arch/x86/system.cc

63 X86ISA::installSegDesc(ThreadContext *tc, SegmentRegIndex seg,
100     tc->setMiscReg(MISCREG_SEG_BASE(seg), desc.base);
101     tc->setMiscReg(MISCREG_SEG_EFF_BASE(seg), honorBase ? desc.base : 0);
102     tc->setMiscReg(MISCREG_SEG_LIMIT(seg), desc.limit);
103     tc->setMiscReg(MISCREG_SEG_ATTR(seg), (RegVal)attr);
117     ThreadContext *tc = threadContexts[0];
176     tc->setMiscReg(MISCREG_CS, (RegVal)cs);
188     tc->setMiscReg(MISCREG_DS, (RegVal)ds);
189     tc->setMiscReg(MISCREG_ES, (RegVal)ds);
190     tc->setMiscReg(MISCREG_FS, (RegVal)ds);
191     tc->setMiscReg(MISCREG_GS, (RegVal)ds);
192     tc->setMiscReg(MISCREG_SS, (RegVal)ds);
194     tc->setMiscReg(MISCREG_TSL, 0);
195     tc->setMiscReg(MISCREG_TSG_BASE, GDTBase);
196     tc->setMiscReg(MISCREG_TSG_LIMIT, 8 * numGDTEntries - 1);
207     tc->setMiscReg(MISCREG_TR, (RegVal)tss);
208     installSegDesc(tc, SYS_SEGMENT_REG_TR, tssDesc, true);
263     CR0 cr0 = tc->readMiscRegNoEffect(MISCREG_CR0);
266     tc->setMiscReg(MISCREG_CR0, cr0);
269     tc->setMiscReg(MISCREG_CR0, cr0);
271     CR4 cr4 = tc->readMiscRegNoEffect(MISCREG_CR4);
274     tc->setMiscReg(MISCREG_CR4, cr4);
277     tc->setMiscReg(MISCREG_CR3, PageMapLevel4);
279     Efer efer = tc->readMiscRegNoEffect(MISCREG_EFER);
282     tc->setMiscReg(MISCREG_EFER, efer);
285     installSegDesc(tc, SEGMENT_REG_CS, csDesc, true);
286     installSegDesc(tc, SEGMENT_REG_DS, dsDesc, true);
287     installSegDesc(tc, SEGMENT_REG_ES, dsDesc, true);
288     installSegDesc(tc, SEGMENT_REG_FS, dsDesc, true);
289     installSegDesc(tc, SEGMENT_REG_GS, dsDesc, true);
290     installSegDesc(tc, SEGMENT_REG_SS, dsDesc, true);
294     tc->setMiscReg(MISCREG_CR0, cr0);
296     tc->pcState(tc->getSystemPtr()->kernelEntry);