Lines Matching defs:miscReg
128 ISA::readMiscRegNoEffect(int miscReg) const
133 assert(isValidMiscReg(miscReg));
135 return regVal[miscReg];
139 ISA::readMiscReg(int miscReg, ThreadContext * tc)
141 if (miscReg == MISCREG_TSC) {
145 if (miscReg == MISCREG_FSW) {
151 return readMiscRegNoEffect(miscReg);
155 ISA::setMiscRegNoEffect(int miscReg, RegVal val)
160 assert(isValidMiscReg(miscReg));
164 switch (miscReg) {
193 regVal[miscReg] = val & mask(reg_width);
197 ISA::setMiscReg(int miscReg, RegVal val, ThreadContext * tc)
200 switch(miscReg)
204 CR0 toggled = regVal[miscReg] ^ val;
241 CR4 toggled = regVal[miscReg] ^ val;
252 SegAttr toggled = regVal[miscReg] ^ val;
292 regVal[MISCREG_SEG_EFF_BASE(miscReg - MISCREG_SEG_BASE_BASE)] = val;
304 regVal[MISCREG_SEG_EFF_BASE(miscReg -
318 miscReg = MISCREG_DR6;
335 miscReg = MISCREG_DR7;
394 setMiscRegNoEffect(miscReg, newVal);