arch/sparc/tlb.cc

88         if (!t->pte.locked()) {
154             } while (tlb[x].pte.locked());
179     new_entry->pte = PTE;
223     DPRINTF(TLB, "TLB: Valid entry found pa: %#x size: %#x\n", t->pte.paddr(),
224             t->pte.size());
250                    tlb[x].range.va, tlb[x].pte.paddr(), tlb[x].pte());
315         if (tlb[x].valid && !tlb[x].pte.locked() &&
351         return tlb[entry].pte();
368     tag |= (uint64_t)~tlb[entry].pte._size() << 56;
436                 req->setPaddr(cacheEntry[0]->pte.translate(vaddr));
516     if (!priv && e->pte.priv()) {
527     req->setPaddr(e->pte.translate(vaddr));
575                     (!write || ce->pte.writable())) {
576                     req->setPaddr(ce->pte.translate(vaddr));
577                     if (ce->pte.sideffect() || (ce->pte.paddr() >> 39) & 1) {
590                     (!write || ce->pte.writable())) {
591                     req->setPaddr(ce->pte.translate(vaddr));
592                     if (ce->pte.sideffect() || (ce->pte.paddr() >> 39) & 1) {
733     if (!priv && e->pte.priv()) {
735         writeSfsr(vaddr, write, ct, e->pte.sideffect(), PrivViolation, asi);
739     if (write && !e->pte.writable()) {
741         writeSfsr(vaddr, write, ct, e->pte.sideffect(), OtherFault, asi);
745     if (e->pte.nofault() && !asiIsNoFault(asi)) {
747         writeSfsr(vaddr, write, ct, e->pte.sideffect(), LoadFromNfo, asi);
751     if (e->pte.sideffect() && asiIsNoFault(asi)) {
753         writeSfsr(vaddr, write, ct, e->pte.sideffect(), SideEffect, asi);
757     if (e->pte.sideffect() || (e->pte.paddr() >> 39) & 1)
776     req->setPaddr(e->pte.translate(vaddr));
1061     PageTableEntry pte;
1169         pte.populate(data, bits(va,10,10) ? PageTableEntry::sun4v :
1172                     pte, entry_insert);
1184         pte.populate(data, bits(va,10,10) ? PageTableEntry::sun4v :
1186         insert(va_insert, part_insert, ct_insert, real_insert, pte,