Lines Matching refs:regIdx
106 unsigned regIdx;
117 unsigned int regIndex() { return regIdx; }
159 assert(regIdx < w->maxSpVgprs);
166 vgprIdx = w->remap(regIdx, 1, 1);
171 vgprIdx = w->remap(regIdx, 2, 1);
176 vgprIdx = w->remap(regIdx,sizeof(OperandType), 1);
205 w->computeUnit->cu_id, w->simdId, w->wfSlotId, lane, regIdx, val);
208 assert(regIdx < w->maxSpVgprs);
209 uint32_t vgprIdx = w->remap(regIdx, sizeof(OperandType), 1);
218 w->computeUnit->cu_id, w->simdId, w->wfSlotId, lane, regIdx, val);
220 assert(regIdx < w->maxSpVgprs);
221 uint32_t vgprIdx = w->remap(regIdx, sizeof(uint32_t), 1);
265 assert(regIdx < w->maxDpVgprs);
266 uint32_t vgprIdx = w->remap(regIdx, sizeof(OperandType), 1);
276 w->computeUnit->cu_id, w->simdId, w->wfSlotId, lane, regIdx,
281 assert(regIdx < w->maxDpVgprs);
282 uint32_t vgprIdx = w->remap(regIdx, sizeof(OperandType), 1);
327 assert(regIdx < w->condRegState->numRegs());
329 return w->condRegState->read<OperandType>((int)regIdx, lane);
337 w->computeUnit->cu_id, w->simdId, w->wfSlotId, lane, regIdx,
340 assert(regIdx < w->condRegState->numRegs());
341 w->condRegState->write<OperandType>(regIdx,lane,val);