arch/generic/vec_reg.hh

45  * This register type is to be used to model the SIMD registers.
57  *    a type (VecElem) to which bytes are casted, and the amount of such
60  *    underlying container. As VecRegT has some degree of type information it
66  *    identified by a type (VecElem) and an index (although the view is
166  * of VecRegT to view the container as a vector of NumElems elems of type
179     /** Container type alias. */
182                                               VecRegContainer<SIZE>>::type;
184     /** My type alias. */
195     typename std::enable_if<Condition, void>::type
199     typename std::enable_if<Condition, MyClass&>::type
214     typename std::enable_if<Condition, VecElem&>::type
449  *     copying the primitive type is build on is cheap.
459     /** Alias to the native type of the appropriate size. */
465                     void>::type
466                 >::type
467             >::type
468         >::type;
476     LaneData(typename std::enable_if<sizeof(T) == ByteSz, const T&>::type t)
480     typename std::enable_if<sizeof(T) == ByteSz, MyClass&>::type
487              typename std::enable_if<sizeof(T) == ByteSz, int>::type I = 0>
529     /** My type alias. */
535                                               VecElem>::type;
537             "Asked for non-const lane of const type!");
539             "VecElem type is not integral!");
553     typename std::enable_if<Assignable, MyClass&>::type
564     typename std::enable_if<Assignable, MyClass&>::type
578     template <bool Cond = !Const, typename std::enable_if<Cond, int>::type = 0>
579     operator VecLaneT<typename std::enable_if<Cond, VecElem>::type, true>()
587     struct add_const<VecLaneT<T, Const>> { typedef VecLaneT<T, true> type; };
590 /** View as the Nth lane of type VecElem. */
599 /** View as the const Nth lane of type VecElem. */
608 /** View as the Nth lane of type VecElem. */
617 /** View as the const Nth lane of type VecElem. */
658  * Dummy type aliases and constants for architectures that do not implement