arch/arm/utility.hh

100  * @param tc The thread context.
103 void zeroRegisters(TC *tc);
105 inline void startupCPU(ThreadContext *tc, int cpuId)
107     tc->activate();
118 void initCPU(ThreadContext *tc, int cpuId);
127 inUserMode(ThreadContext *tc)
129     return inUserMode(tc->readMiscRegNoEffect(MISCREG_CPSR));
139 inPrivilegedMode(ThreadContext *tc)
141     return !inUserMode(tc);
144 bool inAArch64(ThreadContext *tc);
147 currOpMode(ThreadContext *tc)
149     CPSR cpsr = tc->readMiscReg(MISCREG_CPSR);
154 currEL(ThreadContext *tc)
156     return opModeToEL(currOpMode(tc));
172  * @param tc The thread context.
181 ELUsingAArch32K(ThreadContext *tc, ExceptionLevel el);
183 bool ELIs32(ThreadContext *tc, ExceptionLevel el);
185 bool ELIs64(ThreadContext *tc, ExceptionLevel el);
191 bool ELIsInHost(ThreadContext *tc, ExceptionLevel el);
193 bool isBigEndian64(ThreadContext *tc);
199  * @param tc ThreadContext
203 bool badMode32(ThreadContext *tc, OperatingMode mode);
209  * @param tc ThreadContext
213 bool badMode(ThreadContext *tc, OperatingMode mode);
228  * @param tc The thread context.
232 Addr purifyTaggedAddr(Addr addr, ThreadContext *tc, ExceptionLevel el,
234 Addr purifyTaggedAddr(Addr addr, ThreadContext *tc, ExceptionLevel el);
253 bool inSecureState(ThreadContext *tc);
260 inline bool isSecureBelowEL3(ThreadContext *tc);
262 bool longDescFormatInUse(ThreadContext *tc);
267 RegVal readMPIDR(ArmSystem *arm_sys, ThreadContext *tc);
270 RegVal getMPIDR(ArmSystem *arm_sys, ThreadContext *tc);
321 mcrMrc15TrapToHyp(const MiscRegIndex miscReg, ThreadContext *tc, uint32_t iss);
330 bool SPAlignmentCheckEnabled(ThreadContext* tc);
332 uint64_t getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp);
334 void skipFunction(ThreadContext *tc);
346 getExecutingAsid(ThreadContext *tc)
348     return tc->readMiscReg(MISCREG_CONTEXTIDR);
381 inline ByteOrder byteOrder(ThreadContext *tc)
383     return isBigEndian64(tc) ? BigEndianByteOrder : LittleEndianByteOrder;