arch/arm/table_walker.cc

61       stage2Mmu(NULL), port(NULL), masterId(Request::invldMasterId),
62       isStage2(p->is_stage2), tlb(NULL),
63       currState(NULL), pending(false),
184         currState = NULL;
199     WalkerState *savedCurrState = NULL;
346         currState = NULL;
443             currState = NULL;
450     currState = NULL;
526             currState = NULL;
528             currState->tc = NULL;
529             currState->req = NULL;
694             currState = NULL;
696             currState->tc = NULL;
697             currState->req = NULL;
878             currState = NULL;
880             currState->tc = NULL;
881             currState->req = NULL;
910         const unsigned *lookup = NULL; // points to a lookup_level_cutoff
966             currState = NULL;
968             currState->tc = NULL;
969             currState->req = NULL;
988             currState = NULL;
990             currState->tc = NULL;
991             currState->req = NULL;
1012                         LongDescEventByLevel[start_lookup_level], NULL);
1015                         sizeof(uint64_t), flag, -1, NULL,
1475             currState->tc = NULL;
1476             currState->req = NULL;
1529                     currState->tc = NULL;
1530                     currState->req = NULL;
1618             currState->tc = NULL;
1619             currState->req = NULL;
1694                     currState->tc = NULL;
1695                     currState->req = NULL;
1706             Event *event = NULL;
1752             currState->tc = NULL;
1753             currState->req = NULL;
1797         currState->stage2Tran = NULL;
1817         currState->req = NULL;
1818         currState->tc = NULL;
1834         currState->req = NULL;
1835         currState->tc = NULL;
1842     currState = NULL;
1853         currState->stage2Tran = NULL;
1878     currState->req = NULL;
1879     currState->tc = NULL;
1883     currState = NULL;
1920         currState->stage2Tran = NULL;
1937         currState->req = NULL;
1938         currState->tc = NULL;
1952         currState->req = NULL;
1953         currState->tc = NULL;
1962     currState = NULL;
2014                 currState = NULL;
2027                 currState = NULL;
2030             port->dmaAction(MemCmd::ReadReq, descAddr, numBytes, NULL, data,
2118         currState->tc  = NULL;
2119         currState->req = NULL;
2150     if ((currState != NULL) && (currState != pendingQueue.front())) {