arm/insts/sve_macromem.hh

54     IntRegIndex dest;
55     IntRegIndex gp;
56     IntRegIndex base;
57     IntRegIndex offset;
62             IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base,
63             IntRegIndex _offset, uint8_t _numregs)
73                     mnem, machInst, static_cast<IntRegIndex>(INTRLVREG0 + i),
78                     mnem, machInst, static_cast<IntRegIndex>((_dest + i) % 32),
125     IntRegIndex dest;
126     IntRegIndex gp;
127     IntRegIndex base;
128     IntRegIndex offset;
133             IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base,
134             IntRegIndex _offset, uint8_t _numregs)
144                     mnem, machInst, static_cast<IntRegIndex>(INTRLVREG0 + i),
150                     mnem, machInst, static_cast<IntRegIndex>(INTRLVREG0 + i),
198     IntRegIndex dest;
199     IntRegIndex gp;
200     IntRegIndex base;
206             IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base,
217                     mnem, machInst, static_cast<IntRegIndex>(INTRLVREG0 + i),
222                     mnem, machInst, static_cast<IntRegIndex>((_dest + i) % 32),
270     IntRegIndex dest;
271     IntRegIndex gp;
272     IntRegIndex base;
278             IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base,
289                     mnem, machInst, static_cast<IntRegIndex>(INTRLVREG0 + i),
295                     mnem, machInst, static_cast<IntRegIndex>(INTRLVREG0 + i),
343     IntRegIndex dest;
344     IntRegIndex gp;
345     IntRegIndex base;
350                     IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base,
387                 isLoad ? (IntRegIndex) VECREG_UREG0 : _base, _imm, i,
439     IntRegIndex dest;
440     IntRegIndex gp;
441     IntRegIndex base;
442     IntRegIndex offset;
450                     IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base,
451                     IntRegIndex _offset, bool _offsetIs32,
491                 isLoad ? (IntRegIndex) VECREG_UREG0 : _offset, _offsetIs32,