Lines Matching refs:inc

461                      unsigned inc, uint32_t size, uint32_t align, RegIndex rm) :
519 size, machInst, vd * 2, rMid, inc * 2);
524 size, machInst, vd * 2, rMid, inc * 2);
530 size, machInst, vd * 2, rMid, inc * 2);
532 size, machInst, vd * 2 + 2, rMid + 4, inc * 2);
535 size, machInst, vd * 2, rMid, inc * 2);
557 unsigned inc, uint32_t size, uint32_t align,
659 machInst, vd * 2, ufp0, inc * 2);
662 machInst, vd * 2, ufp0, inc * 2, lane);
668 machInst, vd * 2, ufp0, inc * 2);
671 machInst, vd * 2, ufp0, inc * 2, lane);
677 machInst, vd * 2, ufp0, inc * 2);
680 machInst, vd * 2, ufp0, inc * 2, lane);
695 machInst, vd * 2, ufp0, inc * 2);
698 machInst, vd * 2, ufp0, inc * 2, lane);
704 machInst, vd * 2, ufp0, inc * 2);
707 machInst, vd * 2, ufp0, inc * 2, lane);
713 machInst, vd * 2, ufp0, inc * 2);
716 machInst, vd * 2, ufp0, inc * 2, lane);
732 machInst, vd * 2, ufp0, inc * 2);
735 machInst, vd * 2, ufp0, inc * 2, lane);
741 machInst, vd * 2, ufp0, inc * 2);
744 machInst, vd * 2, ufp0, inc * 2, lane);
750 machInst, vd * 2, ufp0, inc * 2);
753 machInst, vd * 2, ufp0, inc * 2, lane);
771 machInst, (vd + offset) * 2, ufp0, inc * 2);
775 machInst, (vd + offset) * 2, ufp0, inc * 2, lane);
782 machInst, (vd + offset) * 2, ufp0, inc * 2);
786 machInst, (vd + offset) * 2, ufp0, inc * 2, lane);
793 machInst, (vd + offset) * 2, ufp0, inc * 2);
797 machInst, (vd + offset) * 2, ufp0, inc * 2, lane);
824 unsigned inc, uint32_t size, uint32_t align, RegIndex rm) :
848 size, machInst, rMid, vd * 2, inc * 2);
853 size, machInst, rMid, vd * 2, inc * 2);
859 size, machInst, rMid, vd * 2, inc * 2);
861 size, machInst, rMid + 4, vd * 2 + 2, inc * 2);
864 size, machInst, rMid, vd * 2, inc * 2);
920 unsigned inc, uint32_t size, uint32_t align,
951 machInst, ufp0, vd * 2, inc * 2, lane);
955 machInst, ufp0, vd * 2, inc * 2, lane);
959 machInst, ufp0, vd * 2, inc * 2, lane);
972 machInst, ufp0, vd * 2, inc * 2, lane);
976 machInst, ufp0, vd * 2, inc * 2, lane);
980 machInst, ufp0, vd * 2, inc * 2, lane);
994 machInst, ufp0, vd * 2, inc * 2, lane);
998 machInst, ufp0, vd * 2, inc * 2, lane);
1002 machInst, ufp0, vd * 2, inc * 2, lane);
1017 machInst, ufp0, (vd + offset) * 2, inc * 2, lane);
1021 machInst, ufp0, (vd + offset) * 2, inc * 2, lane);
1025 machInst, ufp0, (vd + offset) * 2, inc * 2, lane);