arm/insts/macromem.cc

57                        OpClass __opClass, IntRegIndex rn,
68     bool copy_base =  (bits(reglist, rn) && load) || !ones;
100         *uop++ = new MicroAddiUop(machInst, INTREG_UREG0, rn, 0);
128                     copy_base ? INTREG_UREG0 : rn, up, addr);
158                             copy_base ? INTREG_UREG0 : rn, up, addr);
162                             copy_base ? INTREG_UREG0 : rn, up, addr);
166                             copy_base ? INTREG_UREG0 : rn, up, addr);
180                 *uop = new MicroStrUop(machInst, reg_idx, rn, up, addr);
195             *uop++ = new MicroAddiUop(machInst, rn, rn, ones * 4);
197             *uop++ = new MicroSubiUop(machInst, rn, rn, ones * 4);
214             if (rn == INTREG_SP)
246                      IntRegIndex rn, IntRegIndex rt, IntRegIndex rt2) :
262     rn = makeSP(rn);
265         *uop++ = new MicroAddXiSpAlignUop(machInst, INTREG_UREG0, rn,
273                         post ? rn : INTREG_UREG0, 0, noAlloc, exclusive, acrel);
275                         post ? rn : INTREG_UREG0, 16, noAlloc, exclusive, acrel);
278                         post ? rn : INTREG_UREG0, 0, noAlloc, exclusive, acrel);
280                         post ? rn : INTREG_UREG0, 0, noAlloc, exclusive, acrel);
282                         post ? rn : INTREG_UREG0, 16, noAlloc, exclusive, acrel);
284                         post ? rn : INTREG_UREG0, 16, noAlloc, exclusive, acrel);
289                         post ? rn : INTREG_UREG0, 0, noAlloc, exclusive, acrel);
292                         post ? rn : INTREG_UREG0, 0, noAlloc, exclusive, acrel);
294                         post ? rn : INTREG_UREG0, 8, noAlloc, exclusive, acrel);
299                         post ? rn : INTREG_UREG0, 0, noAlloc, exclusive, acrel);
302                         post ? rn : INTREG_UREG0, 0, noAlloc, exclusive, acrel);
309                         post ? rn : INTREG_UREG0, 0, noAlloc, exclusive, acrel);
311                 *uop++ = new MicroStrXImmUop(machInst, rt, post ? rn : INTREG_UREG0,
313                 *uop++ = new MicroStrXImmUop(machInst, rt2, post ? rn : INTREG_UREG0,
320                             post ? rn : INTREG_UREG0, 0, noAlloc, exclusive, acrel);
323                             post ? rn : INTREG_UREG0, 0, noAlloc, exclusive, acrel);
327                         post ? rn : INTREG_UREG0, 0, noAlloc, exclusive, acrel);
333         *uop++ = new MicroAddXiUop(machInst, rn, post ? rn : INTREG_UREG0,
460                      unsigned elems, RegIndex rn, RegIndex vd, unsigned regs,
483                 size, machInst, rMid, rn, 0, align);
485                 size, machInst, rMid + 4, rn, 16, noAlign);
489                 size, machInst, rMid, rn, 0, align);
491                 size, machInst, rMid + 4, rn, 16, noAlign);
495                 size, machInst, rMid, rn, 0, align);
499                 size, machInst, rMid, rn, 0, align);
508                 new MicroAddUop(machInst, rn, rn, rm, 0, ArmISA::LSL);
511                 new MicroAddiUop(machInst, rn, rn, regs * 8);
556                          RegIndex rn, RegIndex vd, unsigned regs,
584                 machInst, ufp0, rn, 0, align);
589                     machInst, ufp0, rn, 0, align);
592                     machInst, ufp0, rn, 0, align);
597                 machInst, ufp0, rn, 0, align);
603                     machInst, ufp0, rn, 0, align);
607                     machInst, ufp0, rn, 0, align);
611                     machInst, ufp0, rn, 0, align);
617                 machInst, ufp0, rn, 0, align);
623                     machInst, ufp0, rn, 0, align);
627                     machInst, ufp0, rn, 0, align);
633                 machInst, ufp0, rn, 0, align);
637                 machInst, ufp0, rn, 0, align);
646                 new MicroAddUop(machInst, rn, rn, rm, 0, ArmISA::LSL);
649                 new MicroAddiUop(machInst, rn, rn, loadSize);
823                      unsigned elems, RegIndex rn, RegIndex vd, unsigned regs,
875                 size, machInst, rMid, rn, 0, align);
877                 size, machInst, rMid + 4, rn, 16, noAlign);
881                 size, machInst, rMid, rn, 0, align);
883                 size, machInst, rMid + 4, rn, 16, noAlign);
887                 size, machInst, rMid, rn, 0, align);
891                 size, machInst, rMid, rn, 0, align);
900                 new MicroAddUop(machInst, rn, rn, rm, 0, ArmISA::LSL);
903                 new MicroAddiUop(machInst, rn, rn, regs * 8);
919                          RegIndex rn, RegIndex vd, unsigned regs,
1041                 machInst, ufp0, rn, 0, align);
1046                     machInst, ufp0, rn, 0, align);
1049                     machInst, ufp0, rn, 0, align);
1054                 machInst, ufp0, rn, 0, align);
1060                     machInst, ufp0, rn, 0, align);
1064                     machInst, ufp0, rn, 0, align);
1068                     machInst, ufp0, rn, 0, align);
1074                 machInst, ufp0, rn, 0, align);
1080                     machInst, ufp0, rn, 0, align);
1084                     machInst, ufp0, rn, 0, align);
1090                 machInst, ufp0, rn, 0, align);
1094                 machInst, ufp0, rn, 0, align);
1103                 new MicroAddUop(machInst, rn, rn, rm, 0, ArmISA::LSL);
1106                 new MicroAddiUop(machInst, rn, rn, storeSize);
1121                          OpClass __opClass, RegIndex rn, RegIndex vd,
1127     RegIndex rnsp = (RegIndex) makeSP((IntRegIndex) rn);
1206                          OpClass __opClass, RegIndex rn, RegIndex vd,
1212     RegIndex rnsp = (RegIndex) makeSP((IntRegIndex) rn);
1291                              OpClass __opClass, RegIndex rn, RegIndex vd,
1301     RegIndex rnsp = (RegIndex) makeSP((IntRegIndex) rn);
1365                              OpClass __opClass, RegIndex rn, RegIndex vd,
1374     RegIndex rnsp = (RegIndex) makeSP((IntRegIndex) rn);
1438                              OpClass __opClass, IntRegIndex rn,
1470                 microOps[i++] = new MicroLdrFpUop(machInst, vd++, rn,
1473                 microOps[i++] = new MicroLdrDBFpUop(machInst, vd++, rn,
1475                 microOps[i++] = new MicroLdrDTFpUop(machInst, vd++, rn, tempUp,
1480                 microOps[i++] = new MicroStrFpUop(machInst, vd++, rn,
1483                 microOps[i++] = new MicroStrDBFpUop(machInst, vd++, rn,
1485                 microOps[i++] = new MicroStrDTFpUop(machInst, vd++, rn, tempUp,
1505                 new MicroAddiUop(machInst, rn, rn, 4 * offset);
1508                 new MicroSubiUop(machInst, rn, rn, 4 * offset);