Lines Matching refs:Link
113 link = sst.Link("cpu_%s_link"%name)
119 link = sst.Link("sysbus_bus_link")
130 link = sst.Link("ioCache_bus_link")
145 link = sst.Link("cpu%u.l1iCache_bus_link" % num) ; bus_port = bus_port + 1
147 link = sst.Link("cpu%u.l1dCache_bus_link" % num) ; bus_port = bus_port + 1
149 link = sst.Link("cpu%u.itlbCache_bus_link" % num) ; bus_port = bus_port + 1
151 link = sst.Link("cpu%u.dtlbCache_bus_link" % num) ; bus_port = bus_port + 1
166 link = sst.Link("l2cache_bus_link")
201 sst.Link("link_cache_net_0").connect((l2cache, "directory", "10ns"), (comp_chiprtr, "port2", "2ns"))
202 sst.Link("link_dir_net_0").connect((comp_chiprtr, "port1", "2ns"), (comp_dirctrl, "network", "2ns"))
203 sst.Link("l2cache_io_link").connect((comp_chiprtr, "port0", "2ns"), (GEM5, "network", buslat))
204 sst.Link("link_dir_mem_link").connect((comp_dirctrl, "memory", "10ns"), (memory, "direct_link", "10ns"))