ext/mcpat/system.cc

72             children.push_back(new Core(childXML, currCore, &interface_ip));
75             children.push_back(new CacheUnit(childXML, &interface_ip));
77             // TODO: Remove reliance on interface_ip - there should be a better
79             children.push_back(new CacheController(childXML, &interface_ip));
81             children.push_back(new MemoryController(childXML, &interface_ip));
83             children.push_back(new FlashController(childXML, &interface_ip));
85             children.push_back(new NIUController(childXML, &interface_ip));
87             children.push_back(new PCIeController(childXML, &interface_ip));
95                                                  &interface_ip));
101             children.push_back(new BusInterconnect(childXML, &interface_ip));
217         ASSIGN_INT_IF("wire_is_mat_type", interface_ip.wire_is_mat_type);
218         ASSIGN_INT_IF("wire_os_mat_type", interface_ip.wire_os_mat_type);
219         ASSIGN_INT_IF("delay_wt", interface_ip.delay_wt);
220         ASSIGN_INT_IF("area_wt", interface_ip.area_wt);
221         ASSIGN_INT_IF("dynamic_power_wt", interface_ip.dynamic_power_wt);
222         ASSIGN_INT_IF("leakage_power_wt", interface_ip.leakage_power_wt);
223         ASSIGN_INT_IF("cycle_time_wt", interface_ip.cycle_time_wt);
224         ASSIGN_INT_IF("delay_dev", interface_ip.delay_dev);
225         ASSIGN_INT_IF("area_dev", interface_ip.area_dev);
226         ASSIGN_INT_IF("dynamic_power_dev", interface_ip.dynamic_power_dev);
227         ASSIGN_INT_IF("leakage_power_dev", interface_ip.leakage_power_dev);
228         ASSIGN_INT_IF("cycle_time_dev", interface_ip.cycle_time_dev);
229         ASSIGN_INT_IF("ed", interface_ip.ed);
230         ASSIGN_INT_IF("burst_len", interface_ip.burst_len);
231         ASSIGN_INT_IF("int_prefetch_w", interface_ip.int_prefetch_w);
232         ASSIGN_INT_IF("page_sz_bits", interface_ip.page_sz_bits);
233         ASSIGN_ENUM_IF("rpters_in_htree", interface_ip.rpters_in_htree, bool);
235                       interface_ip.ver_htree_wires_over_array);
237                       interface_ip.broadcast_addr_din_over_ver_htrees);
238         ASSIGN_INT_IF("nuca", interface_ip.nuca);
239         ASSIGN_INT_IF("nuca_bank_count", interface_ip.nuca_bank_count);
241                        interface_ip.force_cache_config, bool);
242         ASSIGN_ENUM_IF("wt", interface_ip.wt, Wire_type);
243         ASSIGN_INT_IF("force_wiretype", interface_ip.force_wiretype);
244         ASSIGN_INT_IF("print_detail", interface_ip.print_detail);
245         ASSIGN_ENUM_IF("add_ecc_b_", interface_ip.add_ecc_b_, bool);
306     interface_ip.data_arr_ram_cell_tech_type = device_type;
307     interface_ip.data_arr_peri_global_tech_type = device_type;
308     interface_ip.tag_arr_ram_cell_tech_type = device_type;
309     interface_ip.tag_arr_peri_global_tech_type = device_type;
311     interface_ip.ic_proj_type = interconnect_projection_type;
312     interface_ip.temp = temperature;
313     interface_ip.F_sz_nm = core_tech_node;
314     interface_ip.F_sz_um = interface_ip.F_sz_nm / 1000;
315     interface_ip.is_main_mem = false;
319     interface_ip.cache_sz = MIN_BUFFER_SIZE;
320     interface_ip.nbanks = 1;
321     interface_ip.out_w = 0;
322     interface_ip.line_sz = 1;
323     interface_ip.assoc = 1;
324     interface_ip.num_rw_ports = 1;
325     interface_ip.num_search_ports = 1;
326     interface_ip.is_cache = true;
327     interface_ip.pure_ram = false;
328     interface_ip.pure_cam = false;
334     interface_ip.specific_tag = 1;
335     interface_ip.tag_w = 64;
336     interface_ip.access_mode = 2;
338     interface_ip.obj_func_dyn_energy = 0;
339     interface_ip.obj_func_dyn_power = 0;
340     interface_ip.obj_func_leak_power = 0;
341     interface_ip.obj_func_cycle_t = 1;
342     interface_ip.num_rw_ports = 1;
343     interface_ip.num_rd_ports = 0;
344     interface_ip.num_wr_ports = 0;
345     interface_ip.num_se_rd_ports = 0;