Lines Matching refs:getLoad
49 ElectricalLoad* gate_a1_load = cell_->getLoad(name_ + "_CgA1");
50 ElectricalLoad* gate_a2_load = cell_->getLoad(name_ + "_CgA2");
51 ElectricalLoad* drain_load = cell_->getLoad(name_ + "_CdZN");
118 cell_->getLoad(name_ + "_CgA1")->setLoadCap(c_g);
119 cell_->getLoad(name_ + "_CgA2")->setLoadCap(c_g);
120 cell_->getLoad(name_ + "_CdZN")->setLoadCap(c_d + wire_cap);
149 ElectricalLoad* gate_a1_load = cell_->getLoad(name_ + "_CgA1");
150 ElectricalLoad* gate_a2_load = cell_->getLoad(name_ + "_CgA2");
151 ElectricalLoad* drain_load = cell_->getLoad(name_ + "_CdZN");
220 cell_->getLoad(name_ + "_CgA1")->setLoadCap(c_g);
221 cell_->getLoad(name_ + "_CgA2")->setLoadCap(c_g);
222 cell_->getLoad(name_ + "_CdZN")->setLoadCap(c_d + wire_cap);
250 ElectricalLoad* gate_load = cell_->getLoad(name_ + "_CgA");
251 ElectricalLoad* drain_load = cell_->getLoad(name_ + "_CdZN");
310 cell_->getLoad(name_ + "_CgA")->setLoadCap(c_g);
311 cell_->getLoad(name_ + "_CdZN")->setLoadCap(c_d + wire_cap);
341 ElectricalLoad* gate_a_load = cell_->getLoad(name_ + "_CgA");
342 ElectricalLoad* gate_oe_load = cell_->getLoad(name_ + "_CgOE");
343 ElectricalLoad* gate_oen_load = cell_->getLoad(name_ + "_CgOEN");
344 ElectricalLoad* drain_load = cell_->getLoad(name_ + "_CdZN");
429 cell_->getLoad(name_ + "_CgA")->setLoadCap(c_g_a);
430 cell_->getLoad(name_ + "_CgOE")->setLoadCap(c_g_oe);
431 cell_->getLoad(name_ + "_CgOEN")->setLoadCap(c_g_oen);
432 cell_->getLoad(name_ + "_CdZN")->setLoadCap(c_d + wire_cap);