Lines Matching defs:system
30 """ This file creates a barebones system and executes 'hello', a simple Hello
49 # create the system we are going to simulate
50 system = System()
52 # Set the clock fequency of the system (and all of its children)
53 system.clk_domain = SrcClockDomain()
54 system.clk_domain.clock = '1GHz'
55 system.clk_domain.voltage_domain = VoltageDomain()
57 # Set up the system
58 system.mem_mode = 'timing' # Use timing accesses
59 system.mem_ranges = [AddrRange('512MB')] # Create an address range
62 system.cpu = TimingSimpleCPU()
64 # Create a memory bus, a system crossbar, in this case
65 system.membus = SystemXBar()
68 system.cpu.icache_port = system.membus.slave
69 system.cpu.dcache_port = system.membus.slave
72 system.cpu.createInterruptController()
77 system.cpu.interrupts[0].pio = system.membus.master
78 system.cpu.interrupts[0].int_master = system.membus.slave
79 system.cpu.interrupts[0].int_slave = system.membus.master
82 system.mem_ctrl = DDR3_1600_8x8()
83 system.mem_ctrl.range = system.mem_ranges[0]
84 system.mem_ctrl.port = system.membus.master
86 # Connect the system up to the membus
87 system.system_port = system.membus.slave
104 system.cpu.workload = process
105 system.cpu.createThreads()
108 root = Root(full_system = False, system = system)