Lines Matching defs:system
89 # Start with the system itself, using a multi-layer 2.0 GHz
92 system = System(membus = IOXBar(width = 32))
93 system.clk_domain = SrcClockDomain(clock = '2.0GHz',
100 system.mem_ranges = [mem_range]
103 system.mmap_using_noreserve = True
111 MemConfig.config_mem(args, system)
114 if not isinstance(system.mem_ctrls[0], m5.objects.DRAMCtrl):
118 system.mem_ctrls[0].null = True
123 system.mem_ctrls[0].addr_mapping = "RoCoRaBaCh"
125 system.mem_ctrls[0].addr_mapping = "RoRaBaCoCh"
129 system.mem_ctrls[0].page_policy = args.page_policy
142 nbr_banks = int(system.mem_ctrls[0].banks_per_rank.value)
145 burst_size = int((system.mem_ctrls[0].devices_per_rank.value *
146 system.mem_ctrls[0].device_bus_width.value *
147 system.mem_ctrls[0].burst_length.value) / 8)
150 page_size = system.mem_ctrls[0].devices_per_rank.value * \
151 system.mem_ctrls[0].device_rowbuffer_size.value
157 itt_min = system.mem_ctrls[0].tBURST.value * 1000000000000
165 pd_entry_time = (system.mem_ctrls[0].tRAS.value +
166 system.mem_ctrls[0].tRP.value +
167 system.mem_ctrls[0].tCK.value) * 1000000000000
223 system.tgen = TrafficGen(config_file = cfg_file_name)
226 system.monitor = CommMonitor()
229 system.tgen.port = system.monitor.slave
230 system.monitor.master = system.membus.slave
232 # connect the system port even if it is not used in this example
233 system.system_port = system.membus.slave
238 root = Root(full_system = False, system = system)
239 root.system.mem_mode = 'timing'