History log of /gem5/util/statetrace/arch/
Revision Date Author Comments
(<<< Hide modified files)
(Show modified files >>>)
11321:02e930db812d 06-Feb-2016 Steve Reinhardt <steve.reinhardt@amd.com>

style: fix missing spaces in control statements

Result of running 'hg m5style --skip-all --fix-control -a'.


/gem5/src/arch/alpha/process.cc
/gem5/src/arch/arm/insts/macromem.cc
/gem5/src/arch/arm/insts/vfp.hh
/gem5/src/arch/arm/kvm/arm_cpu.cc
/gem5/src/arch/arm/linux/system.cc
/gem5/src/arch/arm/tlb.cc
/gem5/src/arch/generic/tlb.cc
/gem5/src/arch/mips/isa.cc
/gem5/src/arch/x86/bios/intelmp.cc
/gem5/src/arch/x86/cpuid.cc
/gem5/src/arch/x86/decoder.cc
/gem5/src/arch/x86/insts/microldstop.cc
/gem5/src/arch/x86/insts/microregop.cc
/gem5/src/arch/x86/insts/static_inst.cc
/gem5/src/arch/x86/insts/static_inst.hh
/gem5/src/arch/x86/nativetrace.cc
/gem5/src/arch/x86/pagetable_walker.cc
/gem5/src/arch/x86/process.cc
/gem5/src/arch/x86/types.hh
/gem5/src/base/atomicio.hh
/gem5/src/base/cp_annotate.cc
/gem5/src/base/fenv.c
/gem5/src/base/loader/elf_object.cc
/gem5/src/base/statistics.cc
/gem5/src/cpu/base.cc
/gem5/src/cpu/kvm/perfevent.cc
/gem5/src/cpu/kvm/x86_cpu.cc
/gem5/src/cpu/minor/decode.cc
/gem5/src/cpu/nativetrace.cc
/gem5/src/cpu/nativetrace.hh
/gem5/src/cpu/o3/inst_queue_impl.hh
/gem5/src/cpu/o3/rename_impl.hh
/gem5/src/cpu/pred/bpred_unit.cc
/gem5/src/cpu/simple/atomic.cc
/gem5/src/cpu/simple/base.cc
/gem5/src/cpu/simple/timing.cc
/gem5/src/dev/alpha/tsunami_cchip.cc
/gem5/src/dev/arm/flash_device.cc
/gem5/src/dev/arm/ufs_device.cc
/gem5/src/dev/intel_8254_timer.cc
/gem5/src/dev/mips/malta_cchip.cc
/gem5/src/dev/virtio/base.cc
/gem5/src/mem/bridge.cc
/gem5/src/mem/cache/prefetch/stride.cc
/gem5/src/mem/dram_ctrl.cc
/gem5/src/mem/physical.cc
/gem5/src/mem/port.cc
/gem5/src/mem/ruby/filters/BulkBloomFilter.cc
/gem5/src/mem/ruby/filters/H3BloomFilter.cc
/gem5/src/mem/ruby/filters/MultiBitSelBloomFilter.cc
/gem5/src/mem/ruby/filters/MultiGrainBloomFilter.cc
/gem5/src/mem/ruby/filters/NonCountingBloomFilter.cc
/gem5/src/mem/ruby/network/MessageBuffer.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.cc
/gem5/src/mem/ruby/network/simple/PerfectSwitch.cc
/gem5/src/mem/ruby/profiler/AccessTraceForAddress.cc
/gem5/src/mem/ruby/slicc_interface/AbstractController.cc
/gem5/src/mem/ruby/structures/AbstractReplacementPolicy.cc
/gem5/src/mem/ruby/structures/BankedArray.cc
/gem5/src/mem/ruby/structures/CacheMemory.cc
/gem5/src/mem/ruby/structures/PseudoLRUPolicy.cc
/gem5/src/mem/ruby/structures/RubyMemoryControl.cc
/gem5/src/mem/ruby/structures/TBETable.hh
/gem5/src/mem/ruby/system/GPUCoalescer.cc
/gem5/src/mem/ruby/system/Sequencer.cc
/gem5/src/mem/ruby/system/VIPERCoalescer.cc
/gem5/src/mem/ruby/system/WeightedLRUPolicy.cc
/gem5/src/mem/serial_link.cc
/gem5/src/mem/stack_dist_calc.cc
/gem5/src/python/swig/pyobject.cc
/gem5/src/sim/backtrace_glibc.cc
/gem5/src/sim/dvfs_handler.cc
/gem5/src/sim/serialize.hh
/gem5/src/sim/syscall_emul.hh
/gem5/tests/test-progs/gpu-hello/src/gpu-hello-kernel.cl
/gem5/tests/test-progs/gpu-hello/src/gpu-hello.cpp
/gem5/tests/test-progs/mwait/mwait.c
amd64/tracechild.cc
arm/tracechild.cc
sparc/tracechild.cc
/gem5/util/tlm/main.cc
/gem5/util/tlm/sc_mm.cc
/gem5/util/tlm/sc_port.cc
/gem5/util/tlm/sc_target.cc
8271:1d3733d3acee 04-May-2011 Ali Saidi <Ali.Saidi@ARM.com>

ARM: Add vfpv3 support to native trace.

8229:78bf55f23338 15-Apr-2011 Nathan Binkert <nate@binkert.org>

includes: sort all includes


/gem5/src/arch/alpha/faults.cc
/gem5/src/arch/alpha/isa.hh
/gem5/src/arch/alpha/isa/main.isa
/gem5/src/arch/alpha/linux/system.cc
/gem5/src/arch/alpha/mt.hh
/gem5/src/arch/alpha/process.cc
/gem5/src/arch/alpha/remote_gdb.cc
/gem5/src/arch/alpha/remote_gdb.hh
/gem5/src/arch/alpha/tlb.cc
/gem5/src/arch/alpha/tru64/process.cc
/gem5/src/arch/alpha/types.hh
/gem5/src/arch/alpha/utility.hh
/gem5/src/arch/arm/faults.cc
/gem5/src/arch/arm/faults.hh
/gem5/src/arch/arm/insts/macromem.cc
/gem5/src/arch/arm/insts/static_inst.cc
/gem5/src/arch/arm/insts/vfp.hh
/gem5/src/arch/arm/intregs.hh
/gem5/src/arch/arm/isa/includes.isa
/gem5/src/arch/arm/linux/atag.hh
/gem5/src/arch/arm/linux/linux.cc
/gem5/src/arch/arm/linux/process.cc
/gem5/src/arch/arm/linux/process.hh
/gem5/src/arch/arm/linux/system.cc
/gem5/src/arch/arm/locked_mem.hh
/gem5/src/arch/arm/pagetable.hh
/gem5/src/arch/arm/predecoder.hh
/gem5/src/arch/arm/process.hh
/gem5/src/arch/arm/registers.hh
/gem5/src/arch/arm/remote_gdb.cc
/gem5/src/arch/arm/system.cc
/gem5/src/arch/arm/system.hh
/gem5/src/arch/arm/table_walker.cc
/gem5/src/arch/arm/table_walker.hh
/gem5/src/arch/arm/tlb.hh
/gem5/src/arch/arm/vtophys.hh
/gem5/src/arch/generic/debugfaults.hh
/gem5/src/arch/generic/types.hh
/gem5/src/arch/mips/dsp.cc
/gem5/src/arch/mips/dsp.hh
/gem5/src/arch/mips/isa.cc
/gem5/src/arch/mips/isa.hh
/gem5/src/arch/mips/isa/includes.isa
/gem5/src/arch/mips/isa_traits.hh
/gem5/src/arch/mips/linux/linux.cc
/gem5/src/arch/mips/linux/process.cc
/gem5/src/arch/mips/linux/process.hh
/gem5/src/arch/mips/linux/system.cc
/gem5/src/arch/mips/mt.hh
/gem5/src/arch/mips/process.cc
/gem5/src/arch/mips/process.hh
/gem5/src/arch/mips/system.cc
/gem5/src/arch/mips/system.hh
/gem5/src/arch/mips/tlb.cc
/gem5/src/arch/mips/tlb.hh
/gem5/src/arch/mips/utility.cc
/gem5/src/arch/mips/utility.hh
/gem5/src/arch/mips/vtophys.hh
/gem5/src/arch/power/insts/floating.hh
/gem5/src/arch/power/insts/integer.hh
/gem5/src/arch/power/isa/includes.isa
/gem5/src/arch/power/linux/linux.cc
/gem5/src/arch/power/linux/process.cc
/gem5/src/arch/power/linux/process.hh
/gem5/src/arch/power/process.hh
/gem5/src/arch/power/tlb.hh
/gem5/src/arch/power/vtophys.hh
/gem5/src/arch/sparc/isa.hh
/gem5/src/arch/sparc/isa/includes.isa
/gem5/src/arch/sparc/isa_traits.hh
/gem5/src/arch/sparc/linux/linux.cc
/gem5/src/arch/sparc/linux/process.cc
/gem5/src/arch/sparc/locked_mem.hh
/gem5/src/arch/sparc/mmapped_ipr.hh
/gem5/src/arch/sparc/nativetrace.cc
/gem5/src/arch/sparc/process.cc
/gem5/src/arch/sparc/process.hh
/gem5/src/arch/sparc/remote_gdb.cc
/gem5/src/arch/sparc/remote_gdb.hh
/gem5/src/arch/sparc/solaris/process.cc
/gem5/src/arch/sparc/solaris/solaris.cc
/gem5/src/arch/sparc/system.cc
/gem5/src/arch/sparc/tlb.cc
/gem5/src/arch/sparc/tlb_map.hh
/gem5/src/arch/sparc/types.hh
/gem5/src/arch/sparc/utility.hh
/gem5/src/arch/sparc/vtophys.cc
/gem5/src/arch/x86/bios/acpi.cc
/gem5/src/arch/x86/bios/intelmp.hh
/gem5/src/arch/x86/emulenv.hh
/gem5/src/arch/x86/faults.hh
/gem5/src/arch/x86/insts/badmicroop.cc
/gem5/src/arch/x86/insts/macroop.hh
/gem5/src/arch/x86/insts/microfpop.cc
/gem5/src/arch/x86/insts/microldstop.cc
/gem5/src/arch/x86/insts/micromediaop.cc
/gem5/src/arch/x86/interrupts.cc
/gem5/src/arch/x86/interrupts.hh
/gem5/src/arch/x86/isa.hh
/gem5/src/arch/x86/isa/includes.isa
/gem5/src/arch/x86/linux/linux.cc
/gem5/src/arch/x86/linux/process.cc
/gem5/src/arch/x86/linux/process.hh
/gem5/src/arch/x86/linux/syscalls.cc
/gem5/src/arch/x86/linux/system.cc
/gem5/src/arch/x86/linux/system.hh
/gem5/src/arch/x86/microcode_rom.hh
/gem5/src/arch/x86/nativetrace.cc
/gem5/src/arch/x86/pagetable_walker.cc
/gem5/src/arch/x86/pagetable_walker.hh
/gem5/src/arch/x86/predecoder.hh
/gem5/src/arch/x86/process.cc
/gem5/src/arch/x86/process.hh
/gem5/src/arch/x86/registers.hh
/gem5/src/arch/x86/remote_gdb.cc
/gem5/src/arch/x86/system.cc
/gem5/src/arch/x86/tlb.cc
/gem5/src/arch/x86/tlb.hh
/gem5/src/base/cp_annotate.cc
/gem5/src/base/cp_annotate.hh
/gem5/src/base/cprintf.hh
/gem5/src/base/debug.cc
/gem5/src/base/fast_alloc.hh
/gem5/src/base/fenv.c
/gem5/src/base/hostinfo.cc
/gem5/src/base/inet.hh
/gem5/src/base/inifile.cc
/gem5/src/base/loader/aout_object.cc
/gem5/src/base/loader/elf_object.cc
/gem5/src/base/loader/elf_object.hh
/gem5/src/base/loader/hex_file.cc
/gem5/src/base/loader/object_file.cc
/gem5/src/base/loader/symtab.cc
/gem5/src/base/misc.cc
/gem5/src/base/mysql.hh
/gem5/src/base/output.cc
/gem5/src/base/pollevent.cc
/gem5/src/base/pollevent.hh
/gem5/src/base/range_map.hh
/gem5/src/base/remote_gdb.cc
/gem5/src/base/remote_gdb.hh
/gem5/src/base/socket.cc
/gem5/src/base/statistics.cc
/gem5/src/base/statistics.hh
/gem5/src/base/stats/info.hh
/gem5/src/base/stats/mysql.cc
/gem5/src/base/stats/output.cc
/gem5/src/base/stats/text.cc
/gem5/src/base/stats/text.hh
/gem5/src/base/str.hh
/gem5/src/base/time.hh
/gem5/src/base/trace.cc
/gem5/src/base/vnc/convert.cc
/gem5/src/base/vnc/vncserver.cc
/gem5/src/base/vnc/vncserver.hh
/gem5/src/cpu/activity.cc
/gem5/src/cpu/activity.hh
/gem5/src/cpu/base.cc
/gem5/src/cpu/base.hh
/gem5/src/cpu/base_dyn_inst_impl.hh
/gem5/src/cpu/checker/cpu.cc
/gem5/src/cpu/checker/cpu.hh
/gem5/src/cpu/checker/cpu_impl.hh
/gem5/src/cpu/cpuevent.hh
/gem5/src/cpu/exetrace.cc
/gem5/src/cpu/func_unit.hh
/gem5/src/cpu/inorder/cpu.cc
/gem5/src/cpu/inorder/cpu.hh
/gem5/src/cpu/inorder/first_stage.cc
/gem5/src/cpu/inorder/first_stage.hh
/gem5/src/cpu/inorder/inorder_cpu_builder.cc
/gem5/src/cpu/inorder/inorder_dyn_inst.cc
/gem5/src/cpu/inorder/inorder_dyn_inst.hh
/gem5/src/cpu/inorder/inorder_trace.cc
/gem5/src/cpu/inorder/pipeline_stage.cc
/gem5/src/cpu/inorder/pipeline_stage.hh
/gem5/src/cpu/inorder/pipeline_traits.5stage.cc
/gem5/src/cpu/inorder/pipeline_traits.5stage.hh
/gem5/src/cpu/inorder/pipeline_traits.9stage.cc
/gem5/src/cpu/inorder/pipeline_traits.9stage.hh
/gem5/src/cpu/inorder/pipeline_traits.9stage.smt2.cc
/gem5/src/cpu/inorder/pipeline_traits.9stage.smt2.hh
/gem5/src/cpu/inorder/pipeline_traits.hh
/gem5/src/cpu/inorder/reg_dep_map.cc
/gem5/src/cpu/inorder/resource.cc
/gem5/src/cpu/inorder/resource.hh
/gem5/src/cpu/inorder/resource_pool.9stage.cc
/gem5/src/cpu/inorder/resource_pool.cc
/gem5/src/cpu/inorder/resource_pool.hh
/gem5/src/cpu/inorder/resource_sked.cc
/gem5/src/cpu/inorder/resource_sked.hh
/gem5/src/cpu/inorder/resources/agen_unit.hh
/gem5/src/cpu/inorder/resources/bpred_unit.hh
/gem5/src/cpu/inorder/resources/branch_predictor.hh
/gem5/src/cpu/inorder/resources/cache_unit.cc
/gem5/src/cpu/inorder/resources/cache_unit.hh
/gem5/src/cpu/inorder/resources/decode_unit.hh
/gem5/src/cpu/inorder/resources/execution_unit.cc
/gem5/src/cpu/inorder/resources/execution_unit.hh
/gem5/src/cpu/inorder/resources/fetch_seq_unit.hh
/gem5/src/cpu/inorder/resources/fetch_unit.cc
/gem5/src/cpu/inorder/resources/fetch_unit.hh
/gem5/src/cpu/inorder/resources/graduation_unit.hh
/gem5/src/cpu/inorder/resources/inst_buffer.cc
/gem5/src/cpu/inorder/resources/inst_buffer.hh
/gem5/src/cpu/inorder/resources/mem_dep_unit.hh
/gem5/src/cpu/inorder/resources/mult_div_unit.cc
/gem5/src/cpu/inorder/resources/mult_div_unit.hh
/gem5/src/cpu/inorder/resources/resource_list.hh
/gem5/src/cpu/inorder/resources/tlb_unit.cc
/gem5/src/cpu/inorder/resources/tlb_unit.hh
/gem5/src/cpu/inorder/resources/use_def.cc
/gem5/src/cpu/inorder/resources/use_def.hh
/gem5/src/cpu/inorder/thread_context.cc
/gem5/src/cpu/inorder/thread_context.hh
/gem5/src/cpu/inorder/thread_state.cc
/gem5/src/cpu/intr_control.cc
/gem5/src/cpu/intr_control.hh
/gem5/src/cpu/nativetrace.hh
/gem5/src/cpu/o3/base_dyn_inst.cc
/gem5/src/cpu/o3/bpred_unit.hh
/gem5/src/cpu/o3/bpred_unit_impl.hh
/gem5/src/cpu/o3/checker_builder.cc
/gem5/src/cpu/o3/commit.cc
/gem5/src/cpu/o3/commit.hh
/gem5/src/cpu/o3/commit_impl.hh
/gem5/src/cpu/o3/cpu.cc
/gem5/src/cpu/o3/cpu.hh
/gem5/src/cpu/o3/cpu_policy.hh
/gem5/src/cpu/o3/decode.cc
/gem5/src/cpu/o3/dyn_inst.hh
/gem5/src/cpu/o3/fetch.cc
/gem5/src/cpu/o3/fetch.hh
/gem5/src/cpu/o3/fetch_impl.hh
/gem5/src/cpu/o3/free_list.cc
/gem5/src/cpu/o3/fu_pool.hh
/gem5/src/cpu/o3/iew.cc
/gem5/src/cpu/o3/iew.hh
/gem5/src/cpu/o3/iew_impl.hh
/gem5/src/cpu/o3/impl.hh
/gem5/src/cpu/o3/inst_queue.cc
/gem5/src/cpu/o3/inst_queue.hh
/gem5/src/cpu/o3/isa_specific.hh
/gem5/src/cpu/o3/lsq.hh
/gem5/src/cpu/o3/lsq_unit.hh
/gem5/src/cpu/o3/lsq_unit_impl.hh
/gem5/src/cpu/o3/mem_dep_unit.cc
/gem5/src/cpu/o3/rename.hh
/gem5/src/cpu/o3/scoreboard.hh
/gem5/src/cpu/o3/thread_context.cc
/gem5/src/cpu/o3/thread_context.hh
/gem5/src/cpu/ozone/back_end.hh
/gem5/src/cpu/ozone/back_end_impl.hh
/gem5/src/cpu/ozone/base_dyn_inst.cc
/gem5/src/cpu/ozone/checker_builder.cc
/gem5/src/cpu/ozone/cpu.hh
/gem5/src/cpu/ozone/cpu_builder.cc
/gem5/src/cpu/ozone/cpu_impl.hh
/gem5/src/cpu/ozone/dyn_inst.hh
/gem5/src/cpu/ozone/dyn_inst_impl.hh
/gem5/src/cpu/ozone/ea_list.cc
/gem5/src/cpu/ozone/front_end.hh
/gem5/src/cpu/ozone/front_end_impl.hh
/gem5/src/cpu/ozone/inorder_back_end.hh
/gem5/src/cpu/ozone/inorder_back_end_impl.hh
/gem5/src/cpu/ozone/inst_queue.cc
/gem5/src/cpu/ozone/inst_queue.hh
/gem5/src/cpu/ozone/inst_queue_impl.hh
/gem5/src/cpu/ozone/lsq_unit.cc
/gem5/src/cpu/ozone/lsq_unit.hh
/gem5/src/cpu/ozone/lw_back_end.hh
/gem5/src/cpu/ozone/lw_lsq.cc
/gem5/src/cpu/ozone/lw_lsq.hh
/gem5/src/cpu/ozone/lw_lsq_impl.hh
/gem5/src/cpu/ozone/ozone_base_dyn_inst.cc
/gem5/src/cpu/ozone/ozone_impl.hh
/gem5/src/cpu/ozone/rename_table.cc
/gem5/src/cpu/ozone/simple_base_dyn_inst.cc
/gem5/src/cpu/ozone/simple_cpu_builder.cc
/gem5/src/cpu/ozone/simple_impl.hh
/gem5/src/cpu/pc_event.cc
/gem5/src/cpu/profile.cc
/gem5/src/cpu/profile.hh
/gem5/src/cpu/quiesce_event.cc
/gem5/src/cpu/sched_list.hh
/gem5/src/cpu/simple/atomic.cc
/gem5/src/cpu/simple/base.cc
/gem5/src/cpu/simple/base.hh
/gem5/src/cpu/simple/timing.cc
/gem5/src/cpu/simple/timing.hh
/gem5/src/cpu/simple_thread.hh
/gem5/src/cpu/static_inst.cc
/gem5/src/cpu/static_inst.hh
/gem5/src/cpu/testers/directedtest/InvalidateGenerator.cc
/gem5/src/cpu/testers/directedtest/InvalidateGenerator.hh
/gem5/src/cpu/testers/directedtest/RubyDirectedTester.hh
/gem5/src/cpu/testers/memtest/memtest.cc
/gem5/src/cpu/testers/memtest/memtest.hh
/gem5/src/cpu/testers/networktest/networktest.cc
/gem5/src/cpu/testers/networktest/networktest.hh
/gem5/src/cpu/testers/rubytest/CheckTable.cc
/gem5/src/cpu/testers/rubytest/RubyTester.hh
/gem5/src/cpu/thread_context.hh
/gem5/src/cpu/thread_state.hh
/gem5/src/cpu/trace/opt_cpu.cc
/gem5/src/cpu/trace/reader/ibm_reader.hh
/gem5/src/cpu/trace/reader/itx_reader.hh
/gem5/src/cpu/trace/reader/mem_trace_reader.hh
/gem5/src/cpu/trace/trace_cpu.cc
/gem5/src/dev/alpha/tsunami.cc
/gem5/src/dev/alpha/tsunami_io.cc
/gem5/src/dev/alpha/tsunami_io.hh
/gem5/src/dev/alpha/tsunami_pchip.cc
/gem5/src/dev/arm/amba_device.cc
/gem5/src/dev/arm/amba_device.hh
/gem5/src/dev/arm/kmi.cc
/gem5/src/dev/arm/kmi.hh
/gem5/src/dev/arm/pl111.cc
/gem5/src/dev/disk_image.cc
/gem5/src/dev/disk_image.hh
/gem5/src/dev/etherbus.hh
/gem5/src/dev/etherdump.hh
/gem5/src/dev/etherint.cc
/gem5/src/dev/etherlink.cc
/gem5/src/dev/etherlink.hh
/gem5/src/dev/ethertap.cc
/gem5/src/dev/ethertap.hh
/gem5/src/dev/ide_ctrl.hh
/gem5/src/dev/ide_disk.cc
/gem5/src/dev/ide_disk.hh
/gem5/src/dev/intel_8254_timer.hh
/gem5/src/dev/io_device.cc
/gem5/src/dev/isa_fake.hh
/gem5/src/dev/mc146818.cc
/gem5/src/dev/mips/malta.cc
/gem5/src/dev/mips/malta_cchip.hh
/gem5/src/dev/mips/malta_io.cc
/gem5/src/dev/mips/malta_pchip.cc
/gem5/src/dev/mips/malta_pchip.hh
/gem5/src/dev/pciconfigall.hh
/gem5/src/dev/platform.hh
/gem5/src/dev/ps2.cc
/gem5/src/dev/simple_disk.hh
/gem5/src/dev/sparc/iob.cc
/gem5/src/dev/sparc/iob.hh
/gem5/src/dev/sparc/mm_disk.cc
/gem5/src/dev/sparc/mm_disk.hh
/gem5/src/dev/terminal.cc
/gem5/src/dev/terminal.hh
/gem5/src/dev/x86/i8042.hh
/gem5/src/dev/x86/i82094aa.hh
/gem5/src/dev/x86/i8259.hh
/gem5/src/dev/x86/intdev.hh
/gem5/src/dev/x86/pc.cc
/gem5/src/dev/x86/south_bridge.hh
/gem5/src/kern/kernel_stats.cc
/gem5/src/kern/kernel_stats.hh
/gem5/src/kern/linux/events.cc
/gem5/src/kern/linux/printk.cc
/gem5/src/kern/operatingsystem.cc
/gem5/src/kern/tru64/dump_mbuf.cc
/gem5/src/kern/tru64/printf.cc
/gem5/src/kern/tru64/tru64.hh
/gem5/src/kern/tru64/tru64_events.cc
/gem5/src/mem/bridge.hh
/gem5/src/mem/bus.hh
/gem5/src/mem/cache/base.hh
/gem5/src/mem/cache/blk.hh
/gem5/src/mem/cache/builder.cc
/gem5/src/mem/cache/cache.hh
/gem5/src/mem/cache/cache_impl.hh
/gem5/src/mem/cache/mshr_queue.hh
/gem5/src/mem/cache/prefetch/base.cc
/gem5/src/mem/cache/prefetch/stride.hh
/gem5/src/mem/cache/tags/base.cc
/gem5/src/mem/cache/tags/base.hh
/gem5/src/mem/cache/tags/cacheset.hh
/gem5/src/mem/cache/tags/fa_lru.hh
/gem5/src/mem/cache/tags/iic.cc
/gem5/src/mem/cache/tags/iic.hh
/gem5/src/mem/cache/tags/iic_repl/gen.cc
/gem5/src/mem/cache/tags/iic_repl/repl.hh
/gem5/src/mem/cache/tags/lru.cc
/gem5/src/mem/cache/tags/lru.hh
/gem5/src/mem/packet.cc
/gem5/src/mem/packet.hh
/gem5/src/mem/page_table.cc
/gem5/src/mem/physical.cc
/gem5/src/mem/ruby/buffers/MessageBuffer.hh
/gem5/src/mem/ruby/common/NetDest.cc
/gem5/src/mem/ruby/common/Set.hh
/gem5/src/mem/ruby/filters/GenericBloomFilter.hh
/gem5/src/mem/ruby/network/Network.cc
/gem5/src/mem/ruby/network/garnet/BaseGarnetNetwork.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/InputUnit_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/OutVcState_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/OutVcState_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/OutputUnit_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/Router_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/Router_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/RoutingUnit_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/RoutingUnit_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/SWallocator_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/SWallocator_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/Switch_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/Switch_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/VCallocator_d.cc
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/VCallocator_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/VirtualChannel_d.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/flitBuffer_d.hh
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/FlexibleConsumer.hh
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.cc
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.hh
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.cc
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.hh
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/NetworkLink.cc
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/NetworkLink.hh
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/Router.cc
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/Router.hh
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/VCarbiter.cc
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/VCarbiter.hh
/gem5/src/mem/ruby/network/garnet/flexible-pipeline/flitBuffer.hh
/gem5/src/mem/ruby/network/orion/Allocator/Arbiter.cc
/gem5/src/mem/ruby/network/orion/Allocator/MatrixArbiter.hh
/gem5/src/mem/ruby/network/orion/Allocator/RRArbiter.cc
/gem5/src/mem/ruby/network/orion/Allocator/RRArbiter.hh
/gem5/src/mem/ruby/network/orion/Allocator/SWAllocator.cc
/gem5/src/mem/ruby/network/orion/Allocator/VCAllocator.cc
/gem5/src/mem/ruby/network/orion/Buffer/Buffer.cc
/gem5/src/mem/ruby/network/orion/Buffer/DecoderUnit.hh
/gem5/src/mem/ruby/network/orion/Buffer/OutdrvUnit.cc
/gem5/src/mem/ruby/network/orion/Buffer/PrechargeUnit.cc
/gem5/src/mem/ruby/network/orion/Buffer/Register.cc
/gem5/src/mem/ruby/network/orion/Buffer/SRAM.cc
/gem5/src/mem/ruby/network/orion/Buffer/SRAM.hh
/gem5/src/mem/ruby/network/orion/Buffer/WordlineUnit.cc
/gem5/src/mem/ruby/network/orion/Clock.cc
/gem5/src/mem/ruby/network/orion/ConfigFile.hh
/gem5/src/mem/ruby/network/orion/Crossbar/Crossbar.cc
/gem5/src/mem/ruby/network/orion/Crossbar/MatrixCrossbar.cc
/gem5/src/mem/ruby/network/orion/Crossbar/MatrixCrossbar.hh
/gem5/src/mem/ruby/network/orion/Crossbar/MultreeCrossbar.cc
/gem5/src/mem/ruby/network/orion/Crossbar/MultreeCrossbar.hh
/gem5/src/mem/ruby/network/orion/FlipFlop.cc
/gem5/src/mem/ruby/network/orion/NetworkPower.cc
/gem5/src/mem/ruby/network/orion/NetworkPower.hh
/gem5/src/mem/ruby/network/orion/OrionConfig.cc
/gem5/src/mem/ruby/network/orion/OrionConfig.hh
/gem5/src/mem/ruby/network/orion/OrionLink.cc
/gem5/src/mem/ruby/network/orion/OrionRouter.cc
/gem5/src/mem/ruby/network/orion/TechParameter.cc
/gem5/src/mem/ruby/network/orion/Wire.cc
/gem5/src/mem/ruby/network/orion/orion.hh
/gem5/src/mem/ruby/network/simple/PerfectSwitch.hh
/gem5/src/mem/ruby/network/simple/Switch.cc
/gem5/src/mem/ruby/network/simple/Throttle.cc
/gem5/src/mem/ruby/network/simple/Throttle.hh
/gem5/src/mem/ruby/network/simple/Topology.cc
/gem5/src/mem/ruby/profiler/CacheProfiler.hh
/gem5/src/mem/ruby/profiler/Profiler.cc
/gem5/src/mem/ruby/profiler/Profiler.hh
/gem5/src/mem/ruby/recorder/CacheRecorder.cc
/gem5/src/mem/ruby/recorder/CacheRecorder.hh
/gem5/src/mem/ruby/recorder/Tracer.hh
/gem5/src/mem/ruby/slicc_interface/AbstractEntry.hh
/gem5/src/mem/ruby/slicc_interface/RubyRequest.hh
/gem5/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.cc
/gem5/src/mem/ruby/slicc_interface/RubySlicc_includes.hh
/gem5/src/mem/ruby/system/CacheMemory.hh
/gem5/src/mem/ruby/system/RubyPort.cc
/gem5/src/mem/ruby/system/RubyPort.hh
/gem5/src/mem/ruby/system/Sequencer.cc
/gem5/src/mem/ruby/system/Sequencer.hh
/gem5/src/mem/ruby/system/WireBuffer.hh
/gem5/src/mem/slicc/symbols/StateMachine.py
/gem5/src/mem/tport.hh
/gem5/src/mem/translating_port.cc
/gem5/src/mem/vport.hh
/gem5/src/python/swig/core.i
/gem5/src/python/swig/event.i
/gem5/src/python/swig/inet.i
/gem5/src/python/swig/pyobject.cc
/gem5/src/python/swig/sim_object.i
/gem5/src/python/swig/stats.i
/gem5/src/python/swig/system.i
/gem5/src/sim/faults.cc
/gem5/src/sim/faults.hh
/gem5/src/sim/init.cc
/gem5/src/sim/process.cc
/gem5/src/sim/process_impl.hh
/gem5/src/sim/pseudo_inst.cc
/gem5/src/sim/serialize.cc
/gem5/src/sim/serialize.hh
/gem5/src/sim/stat_control.cc
/gem5/src/sim/syscall_emul.cc
/gem5/src/sim/syscall_emul.hh
/gem5/src/sim/system.cc
/gem5/src/sim/tlb.cc
/gem5/src/sim/vptr.hh
/gem5/src/unittest/cprintftest.cc
/gem5/src/unittest/cprintftime.cc
/gem5/src/unittest/initest.cc
/gem5/src/unittest/rangemaptest.cc
/gem5/src/unittest/stattest.cc
/gem5/src/unittest/symtest.cc
/gem5/util/ccdrv/devtime.c
/gem5/util/m5/m5.c
amd64/tracechild.cc
amd64/tracechild.hh
arm/tracechild.cc
arm/tracechild.hh
i686/tracechild.cc
i686/tracechild.hh
sparc/tracechild.cc
sparc/tracechild.hh
/gem5/util/statetrace/base/regstate.hh
/gem5/util/statetrace/base/statetrace.cc
/gem5/util/statetrace/base/tracechild.cc
/gem5/util/tap/tap.cc
/gem5/util/term/term.c
8118:92229cb0cee9 03-Mar-2011 Gabe Black <gblack@eecs.umich.edu>

Statetrace: Stub out the missing i386 version of sendState.

8117:2eec3c58e50e 03-Mar-2011 Gabe Black <gblack@eecs.umich.edu>

Statetrace: Rename i386 to i686.

8115:bfbec82af250 03-Mar-2011 Gabe Black <gblack@eecs.umich.edu>

Statetrace: Use sys/user.h instead of linux/user.h.

8113:5c7c804e0645 03-Mar-2011 Gabe Black <gblack@eecs.umich.edu>

Statetrace: Accomodate cross compiling statetrace with scons.

8110:8260f199f7d8 03-Mar-2011 Gabe Black <gblack@eecs.umich.edu>

Statetrace: Get rid of explicit register name handling.

8108:2195c1847f09 03-Mar-2011 Gabe Black <gblack@eecs.umich.edu>

Statetrace: Clean up style.

7414:0a05aa495903 02-Jun-2010 Ali Saidi <Ali.Saidi@ARM.com>

ARM: Fixup native trace support and add some v7/recent stack code

7071:68195a20503b 02-May-2010 Gabe Black <gblack@eecs.umich.edu>

Statetrace: Fix compile problems with the AMD64 version of statetrace.

6417:fbc8d1e996d9 29-Jul-2009 Gabe Black <gblack@eecs.umich.edu>

ARM: Make sure the target process doesn't run away from statetrace.

6411:cf69f61d8f24 27-Jul-2009 Gabe Black <gblack@eecs.umich.edu>

ARM: Only send information that changed between statetrace and M5.

6407:10f05e881153 27-Jul-2009 Ali Saidi <saidi@eecs.umich.edu>

ARM: Add ARM support to statetrace.

6216:2f4020838149 17-May-2009 Nathan Binkert <nate@binkert.org>

includes: sort includes again


/gem5/src/arch/alpha/isa_traits.hh
/gem5/src/arch/alpha/predecoder.hh
/gem5/src/arch/arm/utility.hh
/gem5/src/arch/mips/dsp.hh
/gem5/src/arch/mips/isa_traits.hh
/gem5/src/arch/mips/utility.hh
/gem5/src/arch/sparc/isa_traits.hh
/gem5/src/arch/sparc/predecoder.hh
/gem5/src/arch/sparc/regfile.hh
/gem5/src/arch/x86/bios/acpi.hh
/gem5/src/arch/x86/bios/e820.hh
/gem5/src/arch/x86/bios/intelmp.cc
/gem5/src/arch/x86/bios/smbios.cc
/gem5/src/arch/x86/bios/smbios.hh
/gem5/src/arch/x86/intmessage.hh
/gem5/src/arch/x86/miscregfile.hh
/gem5/src/arch/x86/pagetable.hh
/gem5/src/arch/x86/pagetable_walker.hh
/gem5/src/arch/x86/predecoder.cc
/gem5/src/arch/x86/regfile.hh
/gem5/src/arch/x86/utility.hh
/gem5/src/arch/x86/x86_traits.hh
/gem5/src/base/cp_annotate.hh
/gem5/src/base/crc.cc
/gem5/src/base/inet.cc
/gem5/src/base/inet.hh
/gem5/src/base/intmath.hh
/gem5/src/base/misc.cc
/gem5/src/base/pollevent.cc
/gem5/src/base/res_list.hh
/gem5/src/base/statistics.hh
/gem5/src/base/stats/mysql.cc
/gem5/src/base/stats/output.cc
/gem5/src/cpu/exetrace.hh
/gem5/src/cpu/inorder/comm.hh
/gem5/src/cpu/inorder/inorder_trace.hh
/gem5/src/cpu/inteltrace.hh
/gem5/src/cpu/legiontrace.hh
/gem5/src/cpu/nativetrace.hh
/gem5/src/cpu/o3/2bit_local_pred.hh
/gem5/src/cpu/o3/bpred_unit.hh
/gem5/src/cpu/o3/comm.hh
/gem5/src/cpu/o3/fetch_impl.hh
/gem5/src/cpu/o3/inst_queue.hh
/gem5/src/cpu/o3/ras.hh
/gem5/src/cpu/o3/store_set.hh
/gem5/src/cpu/o3/tournament_pred.hh
/gem5/src/cpu/ozone/ea_list.hh
/gem5/src/cpu/ozone/inst_queue.hh
/gem5/src/cpu/ozone/null_predictor.hh
/gem5/src/cpu/simple/base.cc
/gem5/src/cpu/simple_thread.hh
/gem5/src/cpu/static_inst.hh
/gem5/src/cpu/thread_context.hh
/gem5/src/dev/alpha/backdoor.hh
/gem5/src/dev/etherlink.hh
/gem5/src/dev/etherpkt.hh
/gem5/src/dev/intel_8254_timer.hh
/gem5/src/dev/mips/backdoor.hh
/gem5/src/dev/ns_gige.cc
/gem5/src/dev/sinic.cc
/gem5/src/dev/x86/intdev.hh
/gem5/src/dev/x86/south_bridge.cc
/gem5/src/kern/tru64/dump_mbuf.cc
/gem5/src/kern/tru64/mbuf.hh
/gem5/src/mem/bus.hh
/gem5/src/mem/cache/cache_impl.hh
/gem5/src/mem/cache/mshr.cc
/gem5/src/mem/cache/tags/fa_lru.cc
/gem5/src/mem/cache/tags/fa_lru.hh
/gem5/src/mem/cache/tags/iic_repl/gen.cc
/gem5/src/mem/cache/tags/iic_repl/repl.hh
/gem5/src/mem/cache/tags/lru.hh
/gem5/src/mem/gems_common/util.cc
/gem5/src/mem/packet.hh
/gem5/src/mem/page_table.hh
/gem5/src/mem/physical.cc
/gem5/src/mem/ruby/common/Debug.hh
/gem5/src/mem/ruby/common/Global.hh
/gem5/src/mem/ruby/network/orion/power_ll.cc
/gem5/src/mem/ruby/network/orion/power_utils.cc
/gem5/src/mem/rubymem.cc
/gem5/src/mem/slicc/slicc_global.hh
/gem5/src/python/swig/core.i
/gem5/src/python/swig/event.i
/gem5/src/python/swig/pyobject.hh
/gem5/src/python/swig/sim_object.i
/gem5/src/sim/arguments.hh
/gem5/src/sim/eventq.hh
/gem5/src/sim/init.cc
/gem5/src/sim/insttracer.hh
/gem5/src/sim/sim_object.cc
/gem5/src/sim/simulate.cc
/gem5/src/sim/syscall_emul.hh
/gem5/src/unittest/rangemaptest.cc
/gem5/src/unittest/rangemultimaptest.cc
tracechild_amd64.hh
tracechild_i386.hh
tracechild_sparc.hh
5049:16a0724434b8 05-Sep-2007 Gabe Black <gblack@eecs.umich.edu>

X86/StateTrace: Make m5 and statetrace track mmx and xmm registers, and actually compare xmm.

4955:7093b1eba0a2 07-Aug-2007 Gabe Black <gblack@eecs.umich.edu>

Statetrace: Make statetrace do string instructions all at once like m5 does.

4843:68739bf529d8 01-Aug-2007 Gabe Black <gblack@eecs.umich.edu>

Statetrace: Make sure all the info block strings are printed.

4795:0c5cf74ebb2d 29-Jul-2007 Gabe Black <gblack@eecs.umich.edu>

Statetrace: Make statetrace patch amd64 executables for true single stepping after system calls.
Because of peculiarities in how system calls are returned from, single stepping executes some system calls and the instruction following them in a single step. Statetrace now patches the executable image when it detects a system call to force "correct" behavior, aka the appearance of stepping one instruction every single time.

4791:75f10dd85ec3 29-Jul-2007 Gabe Black <gblack@eecs.umich.edu>

Statetrace: Print the correct address of auxiliary vectors.
The address of the stackpointer proceeding the vector minus 8 should be minus 16.

4780:8bb94c8a70e7 28-Jul-2007 Gabe Black <gblack@eecs.umich.edu>

Statetrace: Implement the AMD64 version of TraceChild.

4245:02bbb73d86e6 15-Mar-2007 Gabe Black <gblack@eecs.umich.edu>

Update to statetrace. This will break it, but I want to make sure it gets into mercurial.

4125:a130ea200cf9 05-Mar-2007 Gabe Black <gblack@eecs.umich.edu>

Fixing statetrace to work with 32 bit SPARC processes, as well as rewritting it's single stepping code.

3382:e8260cd0fc08 19-Oct-2006 Gabe Black <gblack@eecs.umich.edu>

Cleaned up the function a bit to help route out bugs.

3380:382e21bc32f3 18-Oct-2006 Gabe Black <gblack@eecs.umich.edu>

Fixed up exetrace.cc to deal with microcode, and to made floating point register numbers correlate to the numbers used in SPARC in m5 and statetrace.

src/cpu/exetrace.cc:
Fixed up to deal with microcode, and to make floating point register numbers correlate to the numbers used in SPARC.
util/statetrace/arch/tracechild_sparc.cc:
util/statetrace/arch/tracechild_sparc.hh:
Make floating point register numbers correlate to the numbers used in SPARC.

3115:494b6592a4d8 17-Sep-2006 Gabe Black <gblack@eecs.umich.edu>

Adding what was tracedump but is now statetrace to the tree. Let me know if statetrace is also already taken.

util/statetrace/Makefile:
Makefile to build statetrace. Targets are:

statetrace: alias to build using the "native" compiler
statetrace-native: use the native compiler
statetrace-sparc: use the sparc cross compiler

I'll make this a little more fancy and capable later.
util/statetrace/arch/tracechild_i386.cc:
Implementation of i386 support
util/statetrace/arch/tracechild_i386.hh:
Declaration of i386 support
util/statetrace/arch/tracechild_sparc.cc:
implementation of SPARC support
util/statetrace/arch/tracechild_sparc.hh:
declaration of SPARC support
util/statetrace/printer.cc:
Implementation of the "Printer" objects which parse and output the state of the process after each instruction. There are currently two types of printers, nested ones and register ones. These are called NestingPrinter and RegPrinter respectively.
util/statetrace/printer.hh:
Declaration of "Printer" objects
util/statetrace/refcnt.hh:
This is copied from m5. I should use the one already in the tree, but I'll do that later.
util/statetrace/regstate.hh:
Interface for accessing registers.
util/statetrace/statetrace.cc:
Main file with argument parsing and the "main" function which contains the tracing loop.
util/statetrace/tracechild.cc:
Implementation of the base tracechild class.
util/statetrace/tracechild.hh:
Declaration of the base tracechild class.
util/statetrace/tracechild_arch.cc:
This file hooks in support for the appropriate architecture. Just the implementation is brought in, since the main program should ideally not have to know anything at all about an architecture other than it's interface.
util/statetrace/x86.format:
An example output template for x86. A few example SPARC templates will be added later.