12137:d877205ec1bc |
13-Jul-2017 |
Alec Roelke <ar4jc@virginia.edu> |
tests: Upate RISC-V binaries and results
This patch updates the binaries and results for hello and insttest regressions using the compressed extension.
Change-Id: I3d8f2248f490521d3e0dc05c48735cab82b1b04e Reviewed-on: https://gem5-review.googlesource.com/4042 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> |
11960:c7bf1b698ccd |
29-Mar-2017 |
Gabe Black <gabeblack@google.com> |
stats: Update some stats after simulated program exit behavior was changed.
The following CL delayed program exit and changed the stats for many if not most of the SE mode regressions.
commit 2c1286865fc2542a0586ca4ff40b00765d17b348 Author: Brandon Potter <Brandon.Potter@amd.com> Date: Wed Mar 1 14:52:23 2017 -0600
syscall-emul: Rewrite system call exit code
Change-Id: Id241f2b7d5374947597c715ee44febe1acc5ea16 Reviewed-on: https://gem5-review.googlesource.com/2656 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> |
11955:1170d039b31e |
03-Apr-2017 |
Gabe Black <gabeblack@google.com> |
stats: Rename num_syscalls to numSyscalls in the reference stats.
The name of the stat was changed in the following change which broke all the reference outputs.
commit 2367198921765848a4f5b3d020a7cc5776209f80 Author: Brandon Potter <brandon.potter@amd.com> Date: Mon Feb 27 14:10:15 2017 -0500
syscall_emul: [PATCH 15/22] add clone/execve for threading and multiprocess simulations
Change-Id: Id98b085ccae098c50c434ad81a72beee46084f40 Reviewed-on: https://gem5-review.googlesource.com/2651 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> |
11860:67dee11badea |
19-Feb-2017 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Get all stats updated to reflect current behaviour
Line everything up again. |
11833:0e73ec98b6bc |
13-Feb-2017 |
Alec Roelke <ar4jc@virginia.edu> |
riscv: Remove ECALL tests from insttest
The system calls tested in rv64i.cpp in RISC-V's insttest suite have different behavior depending on the operating system and file system they are run on. This patch ignores the output of those tests and only ensures that the instructions in RV64I complete successfully.
[Change deletion of ECALL test to block comment.] [Restore ECALL test but remove test output to test only for completion without error.] [Update patch description and again try to push EMPTY files for rv64i tests.] |
11731:c473ca7cc650 |
30-Nov-2016 |
Jason Lowe-Power <jason@lowepower.com> |
tests: Regression stats updated for recent patches |
11687:b3d5f0e9e258 |
19-Oct-2016 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats to reflect recent changes to floats
Mostly just splitting out the floats ops and corresponding reads/writes. |
11680:b4d943429dc6 |
13-Oct-2016 |
Curtis Dunham <Curtis.Dunham@arm.com> |
stats: update references |
11606:6b749761c398 |
12-Aug-2016 |
Andreas Sandberg <andreas.sandberg@arm.com> |
stats: Update to match classic memory changes |
11570:4aac82f10951 |
21-Jul-2016 |
Curtis Dunham <Curtis.Dunham@arm.com> |
stats: update references |
11530:6e143fd2cabf |
06-Jun-2016 |
Andreas Sandberg <andreas.sandberg@arm.com> |
stats: Add power stats to test references
Change-Id: Ic827213134b199446822f128b81d4a480e777fee |
11507:be6065c1d8d2 |
31-May-2016 |
Curtis Dunham <Curtis.Dunham@arm.com> |
stats: update and fix e273e86a873d |
11502:e273e86a873d |
31-May-2016 |
Curtis Dunham <Curtis.Dunham@arm.com> |
stats: update for snoop filter tweak |
11456:c0fb4435b80f |
21-Apr-2016 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats to reflect cache changes
Removed unused stats, now counting WriteLineReq, and changed how uncacheable writes are handled while responses are outstanding. |
11440:76b5639162af |
08-Apr-2016 |
Curtis Dunham <Curtis.Dunham@arm.com> |
stats: update stats for thermals, indirect BP |
11384:e3cbd2823210 |
17-Mar-2016 |
Steve Reinhardt <steve.reinhardt@amd.com> |
stats: update stats for mmap() change.
SE O3 runs see an additional reg read per mmap() call. |
11312:3d7a85d71bd1 |
22-Jan-2016 |
Tony Gutierrez <anthony.gutierrez@amd.com> |
stats: update stats to after GPU checkin |
11268:8b4b55d79ddd |
12-Dec-2015 |
Anthony Gutierrez <atgutier@umich.edu> |
stats: bump stats to reflect ruby tester changes |
11219:b65d4e878ed2 |
16-Nov-2015 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: updates due to recent chagnesets |
11214:966091379ded |
16-Nov-2015 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: remove wb_penalized and wb_penalized_rate |
11201:b1bd4afb6b16 |
06-Nov-2015 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats to match cache changes |
11138:a611a23c8cc2 |
25-Sep-2015 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats to reflect snoop-filter changes |
11103:38f6188421e0 |
15-Sep-2015 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: updates due to recent changesets including d0934b57735a |
11066:969113566d50 |
30-Aug-2015 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: updates due to recent changes. |
10892:bd37e25fb3b7 |
03-Jul-2015 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats for cache, crossbar and DRAM changes
This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling.
Needless to say, almost every regression is affected. |
10798:74e3c7359393 |
22-Apr-2015 |
Steve Reinhardt <steve.reinhardt@amd.com> |
stats: update for previous changeset
Very small differences in IQ-specific O3 stats. |
10736:4433fb00fa7d |
09-Mar-2015 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: changes to due to recent set of patches |
10726:8a20e2a1562d |
02-Mar-2015 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats to reflect cache and interconnect changes
This is a bulk update of stats to match the changes to cache timing, interconnect timing, and a few minor changes to the o3 CPU. |
10649:104ef22a25f3 |
20-Jan-2015 |
Andreas Hansson <andreas.hansson@arm.com> |
tests: Remove deprecated InOrderCPU tests
This patch removes the three MIPS and SPARC regressions that use the deprecated InOrderCPU.
This is the first step in completely removing the code from the tree, avoiding confusion, and focusing all development efforts on the MinorCPU. Brave new world. |
10628:c9b7e0c69f88 |
23-Dec-2014 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Bump stats for decoder, TLB, prefetcher and DRAM changes
Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller. |
10488:7c27480a5031 |
20-Oct-2014 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: updates due to previous mmap and exit_group patches. |
10451:3a87241adfb8 |
11-Oct-2014 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: updates due to changes to x86, stale configs. |
10433:821cbe4a183b |
09-Oct-2014 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Add DRAM power statistics to reference output |
10409:8c80b91944c5 |
20-Sep-2014 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Bump stats for filter, crossbar and config changes
This patch bumps the stats to reflect the addition of the snoop filter and snoop stats, the change from bus to crossbar, and the updates to the ARM regressions that are now using a different CPU and cache configuration. Lastly, some minor changes are expected due to the activation cleanup of the CPUs. |
10352:5f1f92bf76ee |
03-Sep-2014 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats for CPU and cache changes
This patch updates the stats to reflect the fixes and changes to the CPU (mainly the o3), and the caches. |
10315:9e02c14446bb |
01-Sep-2014 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: updates due to recent ruby and x86 changes Also updates many out of date config files. |
10242:cb4e86c17767 |
22-Jun-2014 |
Steve Reinhardt <steve.reinhardt@amd.com> |
stats: update for O3 changes
Mostly small differences in total ticks, but O3 stall causes shifted significantly.
30.eon does speed up by ~6% on Alpha and ARM, and 50.vortex by 4.5% on ARM. At the other extreme, X86 70.twolf is 0.8% slower. |
10229:aae7735450a9 |
23-May-2014 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: changes due to o3 cpu and ruby message buffer patches |
10220:9eab5efc02e8 |
09-May-2014 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Bump stats for the fixes, and mostly DRAM controller changes |
10148:4574d5882066 |
23-Mar-2014 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats for DRAM changes
This patch updates the stats to reflect the changes to the DRAM controller. |
10063:9595c7a1d837 |
16-Feb-2014 |
Nilay Vaish <nilay@cs.wisc.edu> |
stats: updates due to branch predictor warming |
10036:80e84beef3bb |
24-Jan-2014 |
Ali Saidi <Ali.Saidi@ARM.com> |
stats: update stats for cache occupancy and clock domain changes |
9978:81d7551dd3be |
01-Nov-2013 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Bump stats to match DRAM controller changes
This patch encompasses all the stats updates needed to reflect the changes to the DRAM controller. |
9924:31ef410b6843 |
16-Oct-2013 |
Steve Reinhardt <steve.reinhardt@amd.com> |
test: update stats
Update stats for recent changes. Mostly minor changes in register access stats due to addition of new cc register type and slightly different (and more accurate) classification of int vs. fp register accesses. |
9885:afd9ea6101d9 |
28-Sep-2013 |
Steve Reinhardt <stever@gmail.com> |
tests: update reference outputs
Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority. |
9838:43d22d746e7a |
19-Aug-2013 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Cumulative stats update
This patch updates the stats to reflect the: 1) addition of the internal queue in SimpleMemory, 2) moving of the memory class outside FSConfig, 3) fixing up of the 2D vector printing format, 4) specifying burst size and interface width for the DRAM instead of relying on cache-line size, 5) performing merging in the DRAM controller write buffer, and 6) fixing how idle cycles are counted in the atomic and timing CPU models.
The main reason for bundling them up is to minimise the changeset size. |
9797:9cd5f91e7a79 |
27-Jun-2013 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats for monitor, cache and bus changes
This patch removes the sparse histogram total from the CommMonitor stats. It also bumps the stats after the unit fixes in the atomic cache access. Lastly, it updates the stats to match the new port ordering. All numbers are the same, and the only thing that changes is which master corresponds to what port index. |
9729:e2fafd224f43 |
30-May-2013 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update the stats to reflect bus and memory changes
This patch updates the stats to reflect the addition of the bus stats, and changes to the bus layers. In addition it updates the stats to match the addition of the static pipeline latency of the memory conotroller and the addition of a stat tracking the bytes per activate. |
9620:89aa34e10625 |
27-Mar-2013 |
Nilay Vaish <nilay@cs.wisc.edu> |
regressions: update due to cache latency fix |
9578:49b40999f4a2 |
06-Mar-2013 |
Nilay Vaish <nilay@cs.wisc.edu> |
regressions: stats updates due to no physmem in ruby |
9568:cd1351d4d850 |
01-Mar-2013 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats to reflect SimpleDRAM changes
This patch bumps the stats to reflect the slight change in how the retry is handled, and also the pruning of some redundant stats. |
9510:921d858c5bc7 |
10-Feb-2013 |
Nilay Vaish <nilay@cs.wisc.edu> |
regressions: update stats due to changes to ruby |
9490:e6a09d97bdc9 |
31-Jan-2013 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats for regressions using SimpleDDR3
This patch updates the regression stats to reflect that they are using the SimpleDDR3 controller by default. |
9481:b0fa6b872f40 |
24-Jan-2013 |
Nilay Vaish <nilay@cs.wisc.edu> |
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables. |
9449:56610ab73040 |
07-Jan-2013 |
Ali Saidi <Ali.Saidi@ARM.com> |
stats: update stats for previous changes. |
9348:44d31345e360 |
02-Nov-2012 |
Ali Saidi <Ali.Saidi@ARM.com> |
update stats for preceeding changes |
9322:01c8c5ff2c3b |
30-Oct-2012 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats for unified cache configuration
This patch updates the stats to reflect the changes in the L2 MSHRs, as the latter are now uniform across the regressions. |
9312:e05e1b69ebf2 |
25-Oct-2012 |
Andreas Hansson <andreas.hansson@arm.com> |
stats: Update stats to reflect use of SimpleDRAM
This patch bumps the stats to match the use of SimpleDRAM instead of SimpleMemory in all inorder and O3 regressions, and also all full-system regressions. A number of performance-related stats change, and a whole bunch of stats are added for the memory controller. |
9289:a31a1243a3ed |
15-Oct-2012 |
Andreas Hansson <andreas.hansson@arm.com> |
Stats: Update stats for cache timings in cycles
This patch updates the stats to reflect the change in how cache latencies are expressed. In addition, the latencies are now rounded to multiples of the clock period, thus also affecting other stats. |
9285:9901180cd573 |
15-Oct-2012 |
Andreas Hansson <andreas.hansson@arm.com> |
Stats: Update stats for new default L1-to-L2 bus clock and width
This patch updates the stats to reflect the changes in the clock speed and width for the bus connecting the L1 and L2 caches. |
9276:a5ede748a1d9 |
02-Oct-2012 |
Nilay Vaish <nilay@cs.wisc.edu> |
Regression Tests: Update statistics |
9223:be1c1059438b |
13-Sep-2012 |
Andreas Hansson <andreas.hansson@arm.com> |
Stats: Remove the reference stats that are no longer present
This patch simply removes the commitCommittedInsts and commitCommittedOps from the reference statistics, following their removal from the CPU. |
9150:a2370fa5c793 |
15-Aug-2012 |
Ali Saidi <Ali.Saidi@ARM.com> |
stats: Update stats for syscall emulation Linux kernel changes. |
9096:8971a998190a |
09-Jul-2012 |
Andreas Hansson <andreas.hansson@arm.com> |
Stats: Updates due to bus changes
This patch bumps all the stats to reflect the bus changes, i.e. the introduction of the state variable, the division into a request and response layer, and the new default bus width of 8 bytes. |
9079:9a244ebdc3c9 |
29-Jun-2012 |
Ali Saidi <Ali.Saidi@ARM.com> |
Stats: Update stats for RAS and LRU fixes. |
9055:38f1926fb599 |
05-Jun-2012 |
Ali Saidi <saidi@eecs.umich.edu> |
all: Update stats for memory per master and total fix. |
8983:8800b05e1cb3 |
09-May-2012 |
Nathan Binkert <nate@binkert.org> |
stats: update stats for no_value -> nan Lots of accumulated older changes too. |
8844:a451e4eda591 |
13-Feb-2012 |
Ali Saidi <Ali.Saidi@ARM.com> |
bp: fix up stats for changes to branch predictor |
8835:7c68f84d7c4e |
12-Feb-2012 |
Ali Saidi <Ali.Saidi@ARM.com> |
stats: update stats for insts/ops and master id changes |
8802:ef66a9083bc4 |
28-Jan-2012 |
Gabe Black <gblack@eecs.umich.edu> |
SE/FS: Make both SE and FS tests available all the time. |