stats: Get all stats updated to reflect current behaviourLine everything up again.
stats: Update stats to reflect cache changes
stats: Update stats to reflect recent changes to floatsMostly just splitting out the floats ops and correspondingreads/writes.
stats: update references
stats: Update to match classic memory changes
stats: Update stats to reflect ARM changes
stats: Add power stats to test referencesChange-Id: Ic827213134b199446822f128b81d4a480e777fee
stats: update for snoop filter tweak
stats: Update stats to reflect cache changesRemoved unused stats, now counting WriteLineReq, and changed howuncacheable writes are handled while responses are outstanding.
stats: Match current behaviourSmall changes to the branch predictor and BTB caused stats changesthroughout.
stats: Update stats to reflect forwarding of InvalidateReq
stats: Update stats to reflect changes to cache and crossbar
stats: Update to reflect changes to PCI handling
stats: Update to reflect changes to RealView platform code
stats: remove wb_penalized and wb_penalized_rate
stats: Update stats to match cache changes
stats: Update for UDelayEvent quiesce change
stats: Update stats to reflect snoop-filter changes
stats: updates due to recent changesets including d0934b57735a
stats: Update ARM stats to include programmable oscillators
stats: update stale config.ini files, eio and few other stats.
stats: Update stats for cache, crossbar and DRAM changesThis update includes the changes to whole-line writes, the refinementof Read to ReadClean and ReadShared, the introduction of CleanEvictfor snoop-filter tracking, and updates to the DRAM command schedulerfor bank-group-aware scheduling.Needless to say, almost every regression is affected.
arm, stats: Update stats to reflect reduction in misc reg reads
stats: update for previous changesetVery small differences in IQ-specific O3 stats.
stats: changes to due to recent set of patches
stats: Update stats to reflect cache and interconnect changesThis is a bulk update of stats to match the changes to cache timing,interconnect timing, and a few minor changes to the o3 CPU.
stats: Bump stats for decoder, TLB, prefetcher and DRAM changesChanges due to speculative execution of an unaligned PC, introductionof TLB stats, changes and re-work of the prefetcher, and theintroduction of rank-wise refresh in the DRAM controller.
stats: Bump stats for fixes, mostly TLB and WriteInvalidate
arm, tests: Forgot the system.terminal files for the new regressions.
arm, tests: Add 64-bit ARM regression tests