History log of /gem5/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/
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11159:9459593cb649 06-Oct-2015 Steve Reinhardt <steve.reinhardt@amd.com>

x86: implement fild, fucomi, and fucomip x87 insts

fild loads an integer value into the x87 top of stack register.
fucomi/fucomip compare two x87 register values (the latter
also doing a stack pop).
These instructions are used by some versions of GNU libstdc++.

10474:799c8ee4ecba 16-Oct-2014 Andreas Hansson <andreas.hansson@arm.com>

arch: Use shared_ptr for all Faults

This patch takes quite a large step in transitioning from the ad-hoc
RefCountingPtr to the c++11 shared_ptr by adopting its use for all
Faults. There are no changes in behaviour, and the code modifications
are mostly just replacing "new" with "make_shared".


/gem5/src/arch/alpha/ev5.cc
/gem5/src/arch/alpha/faults.hh
/gem5/src/arch/alpha/interrupts.hh
/gem5/src/arch/alpha/isa/decoder.isa
/gem5/src/arch/alpha/isa/fp.isa
/gem5/src/arch/alpha/isa/opcdec.isa
/gem5/src/arch/alpha/isa/unimp.isa
/gem5/src/arch/alpha/isa/unknown.isa
/gem5/src/arch/alpha/tlb.cc
/gem5/src/arch/alpha/tlb.hh
/gem5/src/arch/arm/insts/static_inst.hh
/gem5/src/arch/arm/interrupts.hh
/gem5/src/arch/arm/isa/formats/breakpoint.isa
/gem5/src/arch/arm/isa/formats/unimp.isa
/gem5/src/arch/arm/isa/insts/branch.isa
/gem5/src/arch/arm/isa/insts/branch64.isa
/gem5/src/arch/arm/isa/insts/data64.isa
/gem5/src/arch/arm/isa/insts/fp.isa
/gem5/src/arch/arm/isa/insts/macromem.isa
/gem5/src/arch/arm/isa/insts/misc.isa
/gem5/src/arch/arm/isa/insts/misc64.isa
/gem5/src/arch/arm/isa/insts/neon.isa
/gem5/src/arch/arm/isa/insts/neon64.isa
/gem5/src/arch/arm/isa/insts/neon64_mem.isa
/gem5/src/arch/arm/isa/insts/swap.isa
/gem5/src/arch/arm/isa/templates/mem64.isa
/gem5/src/arch/arm/isa/templates/neon.isa
/gem5/src/arch/arm/isa/templates/vfp.isa
/gem5/src/arch/arm/table_walker.cc
/gem5/src/arch/arm/table_walker.hh
/gem5/src/arch/arm/tlb.cc
/gem5/src/arch/arm/tlb.hh
/gem5/src/arch/arm/utility.cc
/gem5/src/arch/generic/memhelpers.hh
/gem5/src/arch/mips/interrupts.cc
/gem5/src/arch/mips/isa.hh
/gem5/src/arch/mips/isa/decoder.isa
/gem5/src/arch/mips/isa/formats/control.isa
/gem5/src/arch/mips/isa/formats/dsp.isa
/gem5/src/arch/mips/isa/formats/fp.isa
/gem5/src/arch/mips/isa/formats/int.isa
/gem5/src/arch/mips/isa/formats/mt.isa
/gem5/src/arch/mips/isa/formats/trap.isa
/gem5/src/arch/mips/isa/formats/unimp.isa
/gem5/src/arch/mips/isa/formats/unknown.isa
/gem5/src/arch/mips/mt.hh
/gem5/src/arch/mips/tlb.hh
/gem5/src/arch/power/isa/formats/unimp.isa
/gem5/src/arch/power/isa/formats/unknown.isa
/gem5/src/arch/power/tlb.cc
/gem5/src/arch/power/tlb.hh
/gem5/src/arch/sparc/interrupts.hh
/gem5/src/arch/sparc/isa/base.isa
/gem5/src/arch/sparc/isa/decoder.isa
/gem5/src/arch/sparc/isa/formats/mem/util.isa
/gem5/src/arch/sparc/isa/formats/priv.isa
/gem5/src/arch/sparc/isa/formats/trap.isa
/gem5/src/arch/sparc/isa/formats/unknown.isa
/gem5/src/arch/sparc/tlb.cc
/gem5/src/arch/sparc/tlb.hh
/gem5/src/arch/sparc/utility.cc
/gem5/src/arch/sparc/utility.hh
/gem5/src/arch/x86/interrupts.cc
/gem5/src/arch/x86/isa/formats/string.isa
/gem5/src/arch/x86/isa/formats/unknown.isa
/gem5/src/arch/x86/isa/insts/general_purpose/compare_and_test/bounds.py
/gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py
/gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/jump.py
/gem5/src/arch/x86/isa/insts/system/undefined_operation.py
/gem5/src/arch/x86/isa/insts/x87/arithmetic/addition.py
/gem5/src/arch/x86/isa/insts/x87/arithmetic/subtraction.py
exchange.py
/gem5/src/arch/x86/isa/microops/debug.isa
/gem5/src/arch/x86/isa/microops/regop.isa
/gem5/src/arch/x86/memhelpers.hh
/gem5/src/arch/x86/pagetable_walker.cc
/gem5/src/arch/x86/tlb.cc
/gem5/src/arch/x86/tlb.hh
/gem5/src/arch/x86/vtophys.cc
/gem5/src/base/types.hh
/gem5/src/cpu/base_dyn_inst.hh
/gem5/src/cpu/exec_context.hh
/gem5/src/cpu/inorder/inorder_dyn_inst.cc
/gem5/src/cpu/inorder/inorder_dyn_inst.hh
/gem5/src/cpu/o3/dyn_inst_impl.hh
/gem5/src/cpu/o3/lsq_unit.hh
/gem5/src/cpu/o3/lsq_unit_impl.hh
/gem5/src/cpu/static_inst.hh
/gem5/src/sim/fault_fwd.hh
/gem5/src/sim/faults.hh
/gem5/src/sim/tlb.hh
10043:301f2c0b3423 27-Jan-2014 Nilay Vaish <nilay@cs.wisc.edu>

x86: implements fxch instruction.

9894:c0a3920859bd 29-Sep-2013 Andreas Sandberg <andreas@sandberg.pp.se>

x86: Add support for loading 32-bit and 80-bit floats in the x87

The x87 FPU supports three floating point formats: 32-bit, 64-bit, and
80-bit floats. The current gem5 implementation supports 32-bit and
64-bit floats, but only works correctly for 64-bit floats. This
changeset fixes the 32-bit float handling by correctly loading and
rounding (using truncation) 32-bit floats instead of simply truncating
the bit pattern.

80-bit floats are loaded by first loading the 80-bits of the float to
two temporary integer registers. A micro-op (cvtint_fp80) then
converts the contents of the two integer registers to the internal FP
representation (double). Similarly, when storing an 80-bit float,
there are two conversion routines (ctvfp80h_int and cvtfp80l_int) that
convert an internal FP register to 80-bit and stores the upper 64-bits
or lower 32-bits to an integer register, which is the written to
memory using normal integer stores.

9893:5924b77fb8fc 30-Sep-2013 Andreas Sandberg <andreas@sandberg.pp.se>

x86: Fix re-entrancy problems in x87 store instructions

X87 store instructions typically loads and pops the top value of the
stack and stores it in memory. The current implementation pops the
stack at the same time as the floating point value is loaded to a
temporary register. This will corrupt the state of the x87 stack if
the store fails. This changeset introduces a pop87 micro-instruction
that pops the stack and uses this instruction in the affected
macro-instructions to pop the stack after storing the value to memory.

9582:0632d2d1575c 11-Mar-2013 Nilay Vaish <nilay@cs.wisc.edu>

x86: implement some of the x87 instructions
This patch implements ftan, fprem, fyl2x, fld* floating-point instructions.

7087:fb8d5786ff30 24-May-2010 Nathan Binkert <nate@binkert.org>

copyright: Change HP copyright on x86 code to be more friendly


/gem5/src/arch/x86/SConscript
/gem5/src/arch/x86/X86System.py
/gem5/src/arch/x86/X86TLB.py
/gem5/src/arch/x86/arguments.hh
/gem5/src/arch/x86/bios/ACPI.py
/gem5/src/arch/x86/bios/E820.py
/gem5/src/arch/x86/bios/IntelMP.py
/gem5/src/arch/x86/bios/SConscript
/gem5/src/arch/x86/bios/SMBios.py
/gem5/src/arch/x86/bios/acpi.cc
/gem5/src/arch/x86/bios/acpi.hh
/gem5/src/arch/x86/bios/e820.cc
/gem5/src/arch/x86/bios/e820.hh
/gem5/src/arch/x86/bios/intelmp.cc
/gem5/src/arch/x86/bios/intelmp.hh
/gem5/src/arch/x86/bios/smbios.cc
/gem5/src/arch/x86/bios/smbios.hh
/gem5/src/arch/x86/emulenv.cc
/gem5/src/arch/x86/emulenv.hh
/gem5/src/arch/x86/faults.cc
/gem5/src/arch/x86/faults.hh
/gem5/src/arch/x86/floatregs.hh
/gem5/src/arch/x86/insts/macroop.hh
/gem5/src/arch/x86/insts/microfpop.cc
/gem5/src/arch/x86/insts/microfpop.hh
/gem5/src/arch/x86/insts/microldstop.cc
/gem5/src/arch/x86/insts/microldstop.hh
/gem5/src/arch/x86/insts/microop.cc
/gem5/src/arch/x86/insts/microop.hh
/gem5/src/arch/x86/insts/microregop.cc
/gem5/src/arch/x86/insts/microregop.hh
/gem5/src/arch/x86/insts/static_inst.cc
/gem5/src/arch/x86/insts/static_inst.hh
/gem5/src/arch/x86/interrupts.cc
/gem5/src/arch/x86/interrupts.hh
/gem5/src/arch/x86/intregs.hh
/gem5/src/arch/x86/isa/bitfields.isa
/gem5/src/arch/x86/isa/decoder/decoder.isa
/gem5/src/arch/x86/isa/decoder/one_byte_opcodes.isa
/gem5/src/arch/x86/isa/decoder/two_byte_opcodes.isa
/gem5/src/arch/x86/isa/decoder/x87.isa
/gem5/src/arch/x86/isa/formats/basic.isa
/gem5/src/arch/x86/isa/formats/cpuid.isa
/gem5/src/arch/x86/isa/formats/error.isa
/gem5/src/arch/x86/isa/formats/formats.isa
/gem5/src/arch/x86/isa/formats/multi.isa
/gem5/src/arch/x86/isa/formats/string.isa
/gem5/src/arch/x86/isa/formats/syscall.isa
/gem5/src/arch/x86/isa/formats/unimp.isa
/gem5/src/arch/x86/isa/formats/unknown.isa
/gem5/src/arch/x86/isa/includes.isa
/gem5/src/arch/x86/isa/insts/__init__.py
/gem5/src/arch/x86/isa/insts/general_purpose/__init__.py
/gem5/src/arch/x86/isa/insts/general_purpose/arithmetic/__init__.py
/gem5/src/arch/x86/isa/insts/general_purpose/arithmetic/add_and_subtract.py
/gem5/src/arch/x86/isa/insts/general_purpose/arithmetic/increment_and_decrement.py
/gem5/src/arch/x86/isa/insts/general_purpose/arithmetic/multiply_and_divide.py
/gem5/src/arch/x86/isa/insts/general_purpose/cache_and_memory_management.py
/gem5/src/arch/x86/isa/insts/general_purpose/compare_and_test/__init__.py
/gem5/src/arch/x86/isa/insts/general_purpose/compare_and_test/bit_scan.py
/gem5/src/arch/x86/isa/insts/general_purpose/compare_and_test/bit_test.py
/gem5/src/arch/x86/isa/insts/general_purpose/compare_and_test/bounds.py
/gem5/src/arch/x86/isa/insts/general_purpose/compare_and_test/compare.py
/gem5/src/arch/x86/isa/insts/general_purpose/compare_and_test/set_byte_on_condition.py
/gem5/src/arch/x86/isa/insts/general_purpose/compare_and_test/test.py
/gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/__init__.py
/gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/call.py
/gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/conditional_jump.py
/gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py
/gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/jump.py
/gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/loop.py
/gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/xreturn.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_conversion/__init__.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_conversion/ascii_adjust.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_conversion/bcd_adjust.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_conversion/endian_conversion.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_conversion/extract_sign_mask.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_conversion/sign_extension.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_conversion/translate.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/__init__.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/conditional_move.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/stack_operations.py
/gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/xchg.py
/gem5/src/arch/x86/isa/insts/general_purpose/flags/__init__.py
/gem5/src/arch/x86/isa/insts/general_purpose/flags/load_and_store.py
/gem5/src/arch/x86/isa/insts/general_purpose/flags/push_and_pop.py
/gem5/src/arch/x86/isa/insts/general_purpose/flags/set_and_clear.py
/gem5/src/arch/x86/isa/insts/general_purpose/input_output/__init__.py
/gem5/src/arch/x86/isa/insts/general_purpose/input_output/general_io.py
/gem5/src/arch/x86/isa/insts/general_purpose/input_output/string_io.py
/gem5/src/arch/x86/isa/insts/general_purpose/load_effective_address.py
/gem5/src/arch/x86/isa/insts/general_purpose/load_segment_registers.py
/gem5/src/arch/x86/isa/insts/general_purpose/logical.py
/gem5/src/arch/x86/isa/insts/general_purpose/no_operation.py
/gem5/src/arch/x86/isa/insts/general_purpose/rotate_and_shift/__init__.py
/gem5/src/arch/x86/isa/insts/general_purpose/rotate_and_shift/rotate.py
/gem5/src/arch/x86/isa/insts/general_purpose/rotate_and_shift/shift.py
/gem5/src/arch/x86/isa/insts/general_purpose/semaphores.py
/gem5/src/arch/x86/isa/insts/general_purpose/string/__init__.py
/gem5/src/arch/x86/isa/insts/general_purpose/string/compare_strings.py
/gem5/src/arch/x86/isa/insts/general_purpose/string/load_string.py
/gem5/src/arch/x86/isa/insts/general_purpose/string/move_string.py
/gem5/src/arch/x86/isa/insts/general_purpose/string/scan_string.py
/gem5/src/arch/x86/isa/insts/general_purpose/string/store_string.py
/gem5/src/arch/x86/isa/insts/general_purpose/system_calls.py
/gem5/src/arch/x86/isa/insts/simd128/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/addition.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/division.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/horizontal_addition.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/horizontal_subtraction.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/multiplication.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/reciprocal_estimation.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/reciprocal_square_root.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/simultaneous_addition_and_subtraction.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/square_root.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/subtraction.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/compare/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/compare/compare_and_write_mask.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/compare/compare_and_write_minimum_or_maximum.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/compare/compare_and_write_rflags.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/data_conversion/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/data_conversion/convert_floating_point_to_floating_point.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/data_conversion/convert_floating_point_to_gpr_integer.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/data_conversion/convert_floating_point_to_mmx_integer.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/data_conversion/convert_floating_point_to_xmm_integer.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/data_reordering/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/data_reordering/shuffle.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/data_reordering/unpack_and_interleave.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move_mask.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move_non_temporal.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move_with_duplication.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/logical/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/logical/andp.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/logical/exclusive_or.py
/gem5/src/arch/x86/isa/insts/simd128/floating_point/logical/orp.py
/gem5/src/arch/x86/isa/insts/simd128/integer/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/integer/arithmetic/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/integer/arithmetic/addition.py
/gem5/src/arch/x86/isa/insts/simd128/integer/arithmetic/average.py
/gem5/src/arch/x86/isa/insts/simd128/integer/arithmetic/multiplication.py
/gem5/src/arch/x86/isa/insts/simd128/integer/arithmetic/multiply_add.py
/gem5/src/arch/x86/isa/insts/simd128/integer/arithmetic/subtraction.py
/gem5/src/arch/x86/isa/insts/simd128/integer/arithmetic/sum_of_absolute_differences.py
/gem5/src/arch/x86/isa/insts/simd128/integer/compare/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/integer/compare/compare_and_write_mask.py
/gem5/src/arch/x86/isa/insts/simd128/integer/compare/compare_and_write_minimum_or_maximum.py
/gem5/src/arch/x86/isa/insts/simd128/integer/data_conversion/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/integer/data_conversion/convert_gpr_integer_to_floating_point.py
/gem5/src/arch/x86/isa/insts/simd128/integer/data_conversion/convert_integer_to_floating_point.py
/gem5/src/arch/x86/isa/insts/simd128/integer/data_conversion/convert_mmx_integer_to_floating_point.py
/gem5/src/arch/x86/isa/insts/simd128/integer/data_reordering/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/integer/data_reordering/extract_and_insert.py
/gem5/src/arch/x86/isa/insts/simd128/integer/data_reordering/pack_with_saturation.py
/gem5/src/arch/x86/isa/insts/simd128/integer/data_reordering/shuffle.py
/gem5/src/arch/x86/isa/insts/simd128/integer/data_reordering/unpack_and_interleave.py
/gem5/src/arch/x86/isa/insts/simd128/integer/data_transfer/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/integer/data_transfer/move.py
/gem5/src/arch/x86/isa/insts/simd128/integer/data_transfer/move_mask.py
/gem5/src/arch/x86/isa/insts/simd128/integer/data_transfer/move_non_temporal.py
/gem5/src/arch/x86/isa/insts/simd128/integer/logical/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/integer/logical/exclusive_or.py
/gem5/src/arch/x86/isa/insts/simd128/integer/logical/pand.py
/gem5/src/arch/x86/isa/insts/simd128/integer/logical/por.py
/gem5/src/arch/x86/isa/insts/simd128/integer/save_and_restore_state/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/integer/save_and_restore_state/save_and_restore_control_and_status.py
/gem5/src/arch/x86/isa/insts/simd128/integer/save_and_restore_state/save_and_restore_state.py
/gem5/src/arch/x86/isa/insts/simd128/integer/shift/__init__.py
/gem5/src/arch/x86/isa/insts/simd128/integer/shift/left_logical_shift.py
/gem5/src/arch/x86/isa/insts/simd128/integer/shift/right_arithmetic_shift.py
/gem5/src/arch/x86/isa/insts/simd128/integer/shift/right_logical_shift.py
/gem5/src/arch/x86/isa/insts/simd64/__init__.py
/gem5/src/arch/x86/isa/insts/simd64/floating_point/__init__.py
/gem5/src/arch/x86/isa/insts/simd64/floating_point/arithmetic/__init__.py
/gem5/src/arch/x86/isa/insts/simd64/floating_point/arithmetic/accumulation.py
/gem5/src/arch/x86/isa/insts/simd64/floating_point/arithmetic/addition.py
/gem5/src/arch/x86/isa/insts/simd64/floating_point/arithmetic/multiplication.py
/gem5/src/arch/x86/isa/insts/simd64/floating_point/arithmetic/reciprocal_estimation.py
/gem5/src/arch/x86/isa/insts/simd64/floating_point/arithmetic/reciprocal_square_root.py
/gem5/src/arch/x86/isa/insts/simd64/floating_point/arithmetic/subtraction.py
/gem5/src/arch/x86/isa/insts/simd64/floating_point/compare/__init__.py
/gem5/src/arch/x86/isa/insts/simd64/floating_point/compare/compare_and_write_mask.py
/gem5/src/arch/x86/isa/insts/simd64/floating_point/compare/compare_and_write_minimum_or_maximum.py
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/gem5/src/arch/x86/miscregs.hh
/gem5/src/arch/x86/mmaped_ipr.hh
/gem5/src/arch/x86/pagetable.cc
/gem5/src/arch/x86/pagetable.hh
/gem5/src/arch/x86/pagetable_walker.cc
/gem5/src/arch/x86/pagetable_walker.hh
/gem5/src/arch/x86/predecoder.cc
/gem5/src/arch/x86/predecoder.hh
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/gem5/src/arch/x86/remote_gdb.hh
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/gem5/src/arch/x86/system.cc
/gem5/src/arch/x86/system.hh
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6619:de112a8ac3d8 20-Aug-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Fix the decoding for and fill out FST and FSTP.

5121:a5f3cfdc4ee5 03-Oct-2007 Gabe Black <gblack@eecs.umich.edu>

X86: Fix x87 floating point stack register indexing.

5117:b422964a705c 03-Oct-2007 Gabe Black <gblack@eecs.umich.edu>

X86: Fix up the microcode for the FST and FSTP instructions.

5084:675cb680830f 19-Sep-2007 Gabe Black <gblack@eecs.umich.edu>

X86: Implement the fld, fst, and fstp instructions.

5081:2ccce8600a9d 19-Sep-2007 Gabe Black <gblack@eecs.umich.edu>

X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode.


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