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7087:fb8d5786ff30	24-May-2010	Nathan Binkert <nate@binkert.org>	copyright: Change HP copyright on x86 code to be more friendly /gem5/src/arch/x86/SConscript /gem5/src/arch/x86/X86System.py /gem5/src/arch/x86/X86TLB.py /gem5/src/arch/x86/arguments.hh /gem5/src/arch/x86/bios/ACPI.py /gem5/src/arch/x86/bios/E820.py /gem5/src/arch/x86/bios/IntelMP.py /gem5/src/arch/x86/bios/SConscript /gem5/src/arch/x86/bios/SMBios.py /gem5/src/arch/x86/bios/acpi.cc /gem5/src/arch/x86/bios/acpi.hh /gem5/src/arch/x86/bios/e820.cc /gem5/src/arch/x86/bios/e820.hh /gem5/src/arch/x86/bios/intelmp.cc /gem5/src/arch/x86/bios/intelmp.hh /gem5/src/arch/x86/bios/smbios.cc /gem5/src/arch/x86/bios/smbios.hh /gem5/src/arch/x86/emulenv.cc /gem5/src/arch/x86/emulenv.hh /gem5/src/arch/x86/faults.cc /gem5/src/arch/x86/faults.hh /gem5/src/arch/x86/floatregs.hh /gem5/src/arch/x86/insts/macroop.hh /gem5/src/arch/x86/insts/microfpop.cc /gem5/src/arch/x86/insts/microfpop.hh /gem5/src/arch/x86/insts/microldstop.cc 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/gem5/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/extract.py /gem5/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/load_or_store_floating_point.py /gem5/src/arch/x86/isa/insts/x87/load_constants/__init__.py /gem5/src/arch/x86/isa/insts/x87/load_constants/load_0_1_or_pi.py /gem5/src/arch/x86/isa/insts/x87/load_constants/load_logarithm.py /gem5/src/arch/x86/isa/insts/x87/no_operation.py /gem5/src/arch/x86/isa/insts/x87/stack_management/__init__.py /gem5/src/arch/x86/isa/insts/x87/stack_management/clear_state.py /gem5/src/arch/x86/isa/insts/x87/stack_management/stack_control.py /gem5/src/arch/x86/isa/insts/x87/transcendental_functions/__init__.py /gem5/src/arch/x86/isa/insts/x87/transcendental_functions/logarithmic_functions.py /gem5/src/arch/x86/isa/insts/x87/transcendental_functions/trigonometric_functions.py /gem5/src/arch/x86/isa/macroop.isa /gem5/src/arch/x86/isa/main.isa /gem5/src/arch/x86/isa/microasm.isa /gem5/src/arch/x86/isa/microops/base.isa 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/gem5/src/arch/x86/predecoder.cc /gem5/src/arch/x86/predecoder.hh /gem5/src/arch/x86/predecoder_tables.cc /gem5/src/arch/x86/process.cc /gem5/src/arch/x86/process.hh /gem5/src/arch/x86/registers.hh /gem5/src/arch/x86/remote_gdb.cc /gem5/src/arch/x86/remote_gdb.hh /gem5/src/arch/x86/segmentregs.hh /gem5/src/arch/x86/system.cc /gem5/src/arch/x86/system.hh /gem5/src/arch/x86/tlb.cc /gem5/src/arch/x86/tlb.hh /gem5/src/arch/x86/types.hh /gem5/src/arch/x86/utility.cc /gem5/src/arch/x86/utility.hh /gem5/src/arch/x86/vtophys.cc /gem5/src/arch/x86/vtophys.hh /gem5/src/arch/x86/x86_traits.hh
6478:2ec6bfc8f9c7	07-Aug-2009	Gabe Black <gblack@eecs.umich.edu>	X86: Make the qaud width bswap instruction handle the fact that 32 bit operations zero extend. endian_conversion.py
5927:5e3367b103da	25-Feb-2009	Gabe Black <gblack@eecs.umich.edu>	X86: Do a merge for the zero extension microop. translate.py /gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py /gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/stack_operations.py /gem5/src/arch/x86/isa/insts/general_purpose/input_output/general_io.py /gem5/src/arch/x86/isa/insts/general_purpose/input_output/string_io.py /gem5/src/arch/x86/isa/insts/system/segmentation.py /gem5/src/arch/x86/isa/microops/regop.isa
5814:a9e8668557bf	25-Jan-2009	Gabe Black <gblack@eecs.umich.edu>	X86: Implement the bswap instruction. /gem5/src/arch/x86/isa/decoder/two_byte_opcodes.isa endian_conversion.py
5543:3af77710f397	10-Sep-2008	Ali Saidi <saidi@eecs.umich.edu>	style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs /gem5/configs/common/Benchmarks.py /gem5/src/arch/alpha/aout_machdep.h /gem5/src/arch/alpha/ev5.cc /gem5/src/arch/alpha/floatregfile.hh /gem5/src/arch/alpha/ipr.cc /gem5/src/arch/alpha/ipr.hh /gem5/src/arch/alpha/isa_traits.hh /gem5/src/arch/alpha/linux/linux.cc /gem5/src/arch/alpha/linux/linux.hh /gem5/src/arch/alpha/miscregfile.hh /gem5/src/arch/alpha/osfpal.cc /gem5/src/arch/alpha/pagetable.hh /gem5/src/arch/alpha/regfile.hh /gem5/src/arch/alpha/remote_gdb.cc /gem5/src/arch/alpha/system.cc /gem5/src/arch/alpha/tlb.cc /gem5/src/arch/alpha/tru64/process.cc /gem5/src/arch/alpha/tru64/tru64.cc /gem5/src/arch/alpha/tru64/tru64.hh /gem5/src/arch/isa_parser.py /gem5/src/arch/isa_specific.hh /gem5/src/arch/mips/isa_traits.hh /gem5/src/arch/mips/linux/linux.cc /gem5/src/arch/mips/linux/linux.hh /gem5/src/arch/mips/regfile/regfile.hh /gem5/src/arch/mips/system.cc /gem5/src/arch/mips/tlb.cc /gem5/src/arch/mips/tlb.hh /gem5/src/arch/sparc/isa_traits.hh /gem5/src/arch/sparc/linux/linux.cc /gem5/src/arch/sparc/linux/linux.hh /gem5/src/arch/sparc/miscregfile.hh /gem5/src/arch/sparc/regfile.hh /gem5/src/arch/sparc/remote_gdb.cc /gem5/src/arch/sparc/solaris/solaris.cc /gem5/src/arch/sparc/solaris/solaris.hh /gem5/src/arch/sparc/sparc_traits.hh /gem5/src/arch/x86/isa/insts/general_purpose/cache_and_memory_management.py /gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/call.py /gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py ascii_adjust.py bcd_adjust.py endian_conversion.py extract_sign_mask.py /gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py /gem5/src/arch/x86/isa/insts/general_purpose/load_segment_registers.py /gem5/src/arch/x86/isa/insts/general_purpose/semaphores.py /gem5/src/arch/x86/isa/insts/general_purpose/system_calls.py /gem5/src/arch/x86/linux/linux.hh /gem5/src/arch/x86/remote_gdb.cc /gem5/src/base/bitunion.hh /gem5/src/base/crc.cc /gem5/src/base/fast_alloc.cc /gem5/src/base/fast_alloc.hh /gem5/src/base/inifile.hh /gem5/src/base/loader/aout_object.cc /gem5/src/base/loader/coff_sym.h /gem5/src/base/loader/coff_symconst.h /gem5/src/base/loader/ecoff_object.cc /gem5/src/base/loader/elf_object.cc /gem5/src/base/loader/hex_file.hh /gem5/src/base/loader/object_file.hh /gem5/src/base/loader/symtab.hh /gem5/src/base/remote_gdb.cc /gem5/src/base/res_list.hh /gem5/src/base/stats/flags.hh /gem5/src/base/stats/mysql.cc /gem5/src/base/time.hh /gem5/src/base/trace.hh /gem5/src/cpu/base_dyn_inst.hh /gem5/src/cpu/checker/cpu.hh /gem5/src/cpu/checker/cpu_impl.hh /gem5/src/cpu/memtest/memtest.hh /gem5/src/cpu/o3/alpha/dyn_inst.hh /gem5/src/cpu/o3/mips/dyn_inst.hh /gem5/src/cpu/o3/regfile.hh /gem5/src/cpu/ozone/back_end.hh /gem5/src/cpu/ozone/cpu_impl.hh /gem5/src/cpu/ozone/front_end.hh /gem5/src/cpu/ozone/inorder_back_end.hh /gem5/src/cpu/ozone/lsq_unit_impl.hh /gem5/src/cpu/ozone/lw_back_end.hh /gem5/src/cpu/simple/base.hh /gem5/src/cpu/simple_thread.cc /gem5/src/cpu/simple_thread.hh /gem5/src/cpu/static_inst.hh /gem5/src/dev/alpha/access.h /gem5/src/dev/etherdump.cc /gem5/src/dev/mips/access.h /gem5/src/dev/ns_gige.hh /gem5/src/dev/pcidev.cc /gem5/src/dev/pcireg.h /gem5/src/dev/sinicreg.hh /gem5/src/kern/linux/linux.hh /gem5/src/kern/operatingsystem.hh /gem5/src/kern/solaris/solaris.hh /gem5/src/kern/tru64/mbuf.hh /gem5/src/kern/tru64/tru64.hh /gem5/src/kern/tru64/tru64_syscalls.cc /gem5/src/mem/cache/blk.hh /gem5/src/mem/cache/builder.cc /gem5/src/mem/cache/prefetch/stride.cc /gem5/src/mem/cache/prefetch/stride.hh /gem5/src/mem/cache/tags/iic.cc /gem5/src/mem/cache/tags/lru.cc /gem5/src/mem/cache/tags/lru.hh /gem5/src/mem/cache/tags/split_lru.cc /gem5/src/mem/dram.cc /gem5/src/mem/physical.hh /gem5/src/mem/request.hh /gem5/src/python/m5/SimObject.py /gem5/src/sim/async.hh /gem5/src/sim/debug.cc /gem5/src/sim/eventq.hh /gem5/src/sim/host.hh /gem5/src/sim/insttracer.hh /gem5/src/sim/process.hh /gem5/src/sim/serialize.cc /gem5/src/sim/serialize.hh /gem5/src/sim/sim_events.hh /gem5/src/sim/syscall_emul.cc /gem5/src/sim/syscall_emul.hh /gem5/util/m5/m5op_alpha.S /gem5/util/m5/m5ops.h /gem5/util/term/term.c
5307:e27f5a64f459	03-Dec-2007	Gabe Black <gblack@eecs.umich.edu>	X86: Please excuse my dear Aunt Sally. (precedence bug) sign_extension.py
5239:0920dfb94514	12-Nov-2007	Gabe Black <gblack@eecs.umich.edu>	X86: Change the meaning of the sext and zext width operand, and make sext set zext if the sign bit is 0. sign_extension.py translate.py /gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py /gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/stack_operations.py /gem5/src/arch/x86/isa/insts/general_purpose/input_output/general_io.py /gem5/src/arch/x86/isa/insts/general_purpose/input_output/string_io.py /gem5/src/arch/x86/isa/microops/regop.isa
5165:ce7b4b8a24c5	19-Oct-2007	Gabe Black <gblack@eecs.umich.edu>	X86: Implement the XLAT instruction. /gem5/src/arch/x86/isa/decoder/one_byte_opcodes.isa translate.py
5081:2ccce8600a9d	19-Sep-2007	Gabe Black <gblack@eecs.umich.edu>	X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode. /gem5/src/arch/x86/SConscript /gem5/src/arch/x86/isa/insts/__init__.py /gem5/src/arch/x86/isa/insts/arithmetic/__init__.py /gem5/src/arch/x86/isa/insts/arithmetic/add_and_subtract.py /gem5/src/arch/x86/isa/insts/arithmetic/increment_and_decrement.py /gem5/src/arch/x86/isa/insts/arithmetic/multiply_and_divide.py /gem5/src/arch/x86/isa/insts/cache_and_memory_management.py /gem5/src/arch/x86/isa/insts/compare_and_test/__init__.py /gem5/src/arch/x86/isa/insts/compare_and_test/bit_scan.py /gem5/src/arch/x86/isa/insts/compare_and_test/bit_test.py /gem5/src/arch/x86/isa/insts/compare_and_test/bounds.py /gem5/src/arch/x86/isa/insts/compare_and_test/compare.py /gem5/src/arch/x86/isa/insts/compare_and_test/set_byte_on_condition.py /gem5/src/arch/x86/isa/insts/compare_and_test/test.py /gem5/src/arch/x86/isa/insts/control_transfer/__init__.py /gem5/src/arch/x86/isa/insts/control_transfer/call.py /gem5/src/arch/x86/isa/insts/control_transfer/conditional_jump.py /gem5/src/arch/x86/isa/insts/control_transfer/interrupts_and_exceptions.py /gem5/src/arch/x86/isa/insts/control_transfer/jump.py /gem5/src/arch/x86/isa/insts/control_transfer/loop.py /gem5/src/arch/x86/isa/insts/control_transfer/xreturn.py /gem5/src/arch/x86/isa/insts/data_conversion/__init__.py /gem5/src/arch/x86/isa/insts/data_conversion/ascii_adjust.py /gem5/src/arch/x86/isa/insts/data_conversion/bcd_adjust.py /gem5/src/arch/x86/isa/insts/data_conversion/endian_conversion.py /gem5/src/arch/x86/isa/insts/data_conversion/extract_sign_mask.py /gem5/src/arch/x86/isa/insts/data_conversion/sign_extension.py /gem5/src/arch/x86/isa/insts/data_conversion/translate.py /gem5/src/arch/x86/isa/insts/data_transfer/__init__.py /gem5/src/arch/x86/isa/insts/data_transfer/conditional_move.py /gem5/src/arch/x86/isa/insts/data_transfer/move.py /gem5/src/arch/x86/isa/insts/data_transfer/stack_operations.py /gem5/src/arch/x86/isa/insts/data_transfer/xchg.py /gem5/src/arch/x86/isa/insts/flags/__init__.py /gem5/src/arch/x86/isa/insts/flags/load_and_store.py /gem5/src/arch/x86/isa/insts/flags/push_and_pop.py /gem5/src/arch/x86/isa/insts/flags/set_and_clear.py /gem5/src/arch/x86/isa/insts/general_purpose/__init__.py /gem5/src/arch/x86/isa/insts/general_purpose/arithmetic/__init__.py /gem5/src/arch/x86/isa/insts/general_purpose/arithmetic/add_and_subtract.py /gem5/src/arch/x86/isa/insts/general_purpose/arithmetic/increment_and_decrement.py /gem5/src/arch/x86/isa/insts/general_purpose/arithmetic/multiply_and_divide.py /gem5/src/arch/x86/isa/insts/general_purpose/cache_and_memory_management.py /gem5/src/arch/x86/isa/insts/general_purpose/compare_and_test/__init__.py /gem5/src/arch/x86/isa/insts/general_purpose/compare_and_test/bit_scan.py /gem5/src/arch/x86/isa/insts/general_purpose/compare_and_test/bit_test.py /gem5/src/arch/x86/isa/insts/general_purpose/compare_and_test/bounds.py /gem5/src/arch/x86/isa/insts/general_purpose/compare_and_test/compare.py /gem5/src/arch/x86/isa/insts/general_purpose/compare_and_test/set_byte_on_condition.py /gem5/src/arch/x86/isa/insts/general_purpose/compare_and_test/test.py /gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/__init__.py /gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/call.py /gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/conditional_jump.py /gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py /gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/jump.py /gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/loop.py /gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/xreturn.py __init__.py ascii_adjust.py bcd_adjust.py endian_conversion.py extract_sign_mask.py sign_extension.py translate.py /gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/__init__.py /gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/conditional_move.py /gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py /gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/stack_operations.py /gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/xchg.py /gem5/src/arch/x86/isa/insts/general_purpose/flags/__init__.py /gem5/src/arch/x86/isa/insts/general_purpose/flags/load_and_store.py /gem5/src/arch/x86/isa/insts/general_purpose/flags/push_and_pop.py /gem5/src/arch/x86/isa/insts/general_purpose/flags/set_and_clear.py /gem5/src/arch/x86/isa/insts/general_purpose/input_output/__init__.py /gem5/src/arch/x86/isa/insts/general_purpose/input_output/general_io.py /gem5/src/arch/x86/isa/insts/general_purpose/input_output/string_io.py /gem5/src/arch/x86/isa/insts/general_purpose/load_effective_address.py /gem5/src/arch/x86/isa/insts/general_purpose/load_segment_registers.py /gem5/src/arch/x86/isa/insts/general_purpose/logical.py /gem5/src/arch/x86/isa/insts/general_purpose/no_operation.py /gem5/src/arch/x86/isa/insts/general_purpose/processor_information.py /gem5/src/arch/x86/isa/insts/general_purpose/rotate_and_shift/__init__.py /gem5/src/arch/x86/isa/insts/general_purpose/rotate_and_shift/rotate.py /gem5/src/arch/x86/isa/insts/general_purpose/rotate_and_shift/shift.py /gem5/src/arch/x86/isa/insts/general_purpose/semaphores.py /gem5/src/arch/x86/isa/insts/general_purpose/string/__init__.py /gem5/src/arch/x86/isa/insts/general_purpose/string/compare_strings.py /gem5/src/arch/x86/isa/insts/general_purpose/string/load_string.py /gem5/src/arch/x86/isa/insts/general_purpose/string/move_string.py /gem5/src/arch/x86/isa/insts/general_purpose/string/scan_string.py /gem5/src/arch/x86/isa/insts/general_purpose/string/store_string.py /gem5/src/arch/x86/isa/insts/general_purpose/system_calls.py /gem5/src/arch/x86/isa/insts/input_output/__init__.py /gem5/src/arch/x86/isa/insts/input_output/general_io.py /gem5/src/arch/x86/isa/insts/input_output/string_io.py /gem5/src/arch/x86/isa/insts/load_effective_address.py /gem5/src/arch/x86/isa/insts/load_segment_registers.py /gem5/src/arch/x86/isa/insts/logical.py /gem5/src/arch/x86/isa/insts/no_operation.py /gem5/src/arch/x86/isa/insts/processor_information.py /gem5/src/arch/x86/isa/insts/rotate_and_shift/__init__.py /gem5/src/arch/x86/isa/insts/rotate_and_shift/rotate.py /gem5/src/arch/x86/isa/insts/rotate_and_shift/shift.py /gem5/src/arch/x86/isa/insts/semaphores.py /gem5/src/arch/x86/isa/insts/simd128/__init__.py /gem5/src/arch/x86/isa/insts/simd128/floating_point/__init__.py /gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/__init__.py /gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/addition.py /gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/division.py /gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/horizontal_addition.py /gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/horizontal_subtraction.py /gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/multiplication.py /gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/reciprocal_estimation.py /gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/reciprocal_square_root.py /gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/simultaneous_addition_and_subtraction.py /gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/square_root.py /gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/subtraction.py /gem5/src/arch/x86/isa/insts/simd128/floating_point/compare/__init__.py /gem5/src/arch/x86/isa/insts/simd128/floating_point/compare/compare_and_write_mask.py /gem5/src/arch/x86/isa/insts/simd128/floating_point/compare/compare_and_write_minimum_or_maximum.py /gem5/src/arch/x86/isa/insts/simd128/floating_point/compare/compare_and_write_rflags.py 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