History log of /gem5/ext/libelf/
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12563:8d59ed22ae79 06-Mar-2018 Gabe Black <gabeblack@google.com>

scons: Switch from the print statement to the print function.

Starting with version 3, scons imposes using the print function instead
of the print statement in code it processes. To get things building
again, this change moves all python code within gem5 to use the
function version. Another change by another author separately made this
same change to the site_tools and site_init.py files.

Change-Id: I2de7dc3b1be756baad6f60574c47c8b7e80ea3b0
Reviewed-on: https://gem5-review.googlesource.com/8761
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>

11723:0596db108c53 30-Nov-2016 Alec Roelke <ar4jc@virginia.edu>

arch: [Patch 1/5] Added RISC-V base instruction set RV64I

First of five patches adding RISC-V to GEM5. This patch introduces the
base 64-bit ISA (RV64I) in src/arch/riscv for use with syscall emulation.
The multiply, floating point, and atomic memory instructions will be added
in additional patches, as well as support for more detailed CPU models.
The loader is also modified to be able to parse RISC-V ELF files, and a
"Hello world\!" example for RISC-V is added to test-progs.

Patch 2 will implement the multiply extension, RV64M; patch 3 will implement
the floating point (single- and double-precision) extensions, RV64FD;
patch 4 will implement the atomic memory instructions, RV64A, and patch 5
will add support for timing, minor, and detailed CPU models that is missing
from the first four patches (such as handling locked memory).

[Removed several unused parameters and imports from RiscvInterrupts.py,
RiscvISA.py, and RiscvSystem.py.]
[Fixed copyright information in RISC-V files copied from elsewhere that had
ARM licenses attached.]
[Reorganized instruction definitions in decoder.isa so that they are sorted
by opcode in preparation for the addition of ISA extensions M, A, F, D.]
[Fixed formatting of several files, removed some variables and
instructions that were missed when moving them to other patches, fixed
RISC-V Foundation copyright attribution, and fixed history of files
copied from other architectures using hg copy.]
[Fixed indentation of switch cases in isa.cc.]
[Reorganized syscall descriptions in linux/process.cc to remove large
number of repeated unimplemented system calls and added implmementations
to functions that have received them since it process.cc was first
created.]
[Fixed spacing for some copyright attributions.]
[Replaced the rest of the file copies using hg copy.]
[Fixed style check errors and corrected unaligned memory accesses.]
[Fix some minor formatting mistakes.]
Signed-off by: Alec Roelke

Signed-off by: Jason Lowe-Power <jason@lowepower.com>


/gem5/build_opts/RISCV
elf_common.h
/gem5/src/arch/riscv/RiscvISA.py
/gem5/src/arch/riscv/RiscvInterrupts.py
/gem5/src/arch/riscv/RiscvSystem.py
/gem5/src/arch/riscv/RiscvTLB.py
/gem5/src/arch/riscv/SConscript
/gem5/src/arch/riscv/SConsopts
/gem5/src/arch/riscv/decoder.cc
/gem5/src/arch/riscv/decoder.hh
/gem5/src/arch/riscv/faults.cc
/gem5/src/arch/riscv/faults.hh
/gem5/src/arch/riscv/idle_event.cc
/gem5/src/arch/riscv/idle_event.hh
/gem5/src/arch/riscv/interrupts.cc
/gem5/src/arch/riscv/interrupts.hh
/gem5/src/arch/riscv/isa.cc
/gem5/src/arch/riscv/isa.hh
/gem5/src/arch/riscv/isa/base.isa
/gem5/src/arch/riscv/isa/bitfields.isa
/gem5/src/arch/riscv/isa/decoder.isa
/gem5/src/arch/riscv/isa/formats/basic.isa
/gem5/src/arch/riscv/isa/formats/formats.isa
/gem5/src/arch/riscv/isa/formats/mem.isa
/gem5/src/arch/riscv/isa/formats/type.isa
/gem5/src/arch/riscv/isa/formats/unknown.isa
/gem5/src/arch/riscv/isa/includes.isa
/gem5/src/arch/riscv/isa/main.isa
/gem5/src/arch/riscv/isa/operands.isa
/gem5/src/arch/riscv/isa_traits.hh
/gem5/src/arch/riscv/kernel_stats.hh
/gem5/src/arch/riscv/linux/linux.cc
/gem5/src/arch/riscv/linux/linux.hh
/gem5/src/arch/riscv/linux/process.cc
/gem5/src/arch/riscv/linux/process.hh
/gem5/src/arch/riscv/locked_mem.hh
/gem5/src/arch/riscv/microcode_rom.hh
/gem5/src/arch/riscv/mmapped_ipr.hh
/gem5/src/arch/riscv/pagetable.cc
/gem5/src/arch/riscv/pagetable.hh
/gem5/src/arch/riscv/pra_constants.hh
/gem5/src/arch/riscv/process.cc
/gem5/src/arch/riscv/process.hh
/gem5/src/arch/riscv/pseudo_inst.hh
/gem5/src/arch/riscv/registers.hh
/gem5/src/arch/riscv/remote_gdb.cc
/gem5/src/arch/riscv/remote_gdb.hh
/gem5/src/arch/riscv/stacktrace.cc
/gem5/src/arch/riscv/stacktrace.hh
/gem5/src/arch/riscv/system.cc
/gem5/src/arch/riscv/system.hh
/gem5/src/arch/riscv/tlb.cc
/gem5/src/arch/riscv/tlb.hh
/gem5/src/arch/riscv/types.hh
/gem5/src/arch/riscv/utility.hh
/gem5/src/arch/riscv/vtophys.hh
/gem5/src/base/loader/elf_object.cc
/gem5/src/base/loader/object_file.hh
/gem5/src/cpu/BaseCPU.py
/gem5/src/sim/process.cc
11294:a368064a2ab5 11-Jan-2016 Andreas Hansson <andreas.hansson@arm.com>

scons: Enable -Wextra by default

Make best use of the compiler, and enable -Wextra as well as
-Wall. There are a few issues that had to be resolved, but they are
all trivial.

10037:5cac77888310 24-Jan-2014 ARM gem5 Developers

arm: Add support for ARMv8 (AArch64 & AArch32)

Note: AArch64 and AArch32 interworking is not supported. If you use an AArch64
kernel you are restricted to AArch64 user-mode binaries. This will be addressed
in a later patch.

Note: Virtualization is only supported in AArch32 mode. This will also be fixed
in a later patch.

Contributors:
Giacomo Gabrielli (TrustZone, LPAE, system-level AArch64, AArch64 NEON, validation)
Thomas Grocutt (AArch32 Virtualization, AArch64 FP, validation)
Mbou Eyole (AArch64 NEON, validation)
Ali Saidi (AArch64 Linux support, code integration, validation)
Edmund Grimley-Evans (AArch64 FP)
William Wang (AArch64 Linux support)
Rene De Jong (AArch64 Linux support, performance opt.)
Matt Horsnell (AArch64 MP, validation)
Matt Evans (device models, code integration, validation)
Chris Adeniyi-Jones (AArch64 syscall-emulation)
Prakash Ramrakhyani (validation)
Dam Sunwoo (validation)
Chander Sudanthi (validation)
Stephan Diestelhorst (validation)
Andreas Hansson (code integration, performance opt.)
Eric Van Hensbergen (performance opt.)
Gabe Black


/gem5/configs/common/FSConfig.py
/gem5/configs/common/O3_ARM_v7a.py
/gem5/configs/common/Options.py
/gem5/configs/common/cpu2000.py
/gem5/configs/example/fs.py
/gem5/configs/example/se.py
elf_common.h
/gem5/src/arch/arm/ArmISA.py
/gem5/src/arch/arm/ArmSystem.py
/gem5/src/arch/arm/ArmTLB.py
/gem5/src/arch/arm/SConscript
/gem5/src/arch/arm/decoder.cc
/gem5/src/arch/arm/decoder.hh
/gem5/src/arch/arm/faults.cc
/gem5/src/arch/arm/faults.hh
/gem5/src/arch/arm/insts/branch64.cc
/gem5/src/arch/arm/insts/branch64.hh
/gem5/src/arch/arm/insts/data64.cc
/gem5/src/arch/arm/insts/data64.hh
/gem5/src/arch/arm/insts/fplib.cc
/gem5/src/arch/arm/insts/fplib.hh
/gem5/src/arch/arm/insts/macromem.cc
/gem5/src/arch/arm/insts/macromem.hh
/gem5/src/arch/arm/insts/mem.cc
/gem5/src/arch/arm/insts/mem64.cc
/gem5/src/arch/arm/insts/mem64.hh
/gem5/src/arch/arm/insts/misc.cc
/gem5/src/arch/arm/insts/misc.hh
/gem5/src/arch/arm/insts/misc64.cc
/gem5/src/arch/arm/insts/misc64.hh
/gem5/src/arch/arm/insts/neon64_mem.hh
/gem5/src/arch/arm/insts/pred_inst.hh
/gem5/src/arch/arm/insts/static_inst.cc
/gem5/src/arch/arm/insts/static_inst.hh
/gem5/src/arch/arm/insts/vfp.cc
/gem5/src/arch/arm/insts/vfp.hh
/gem5/src/arch/arm/interrupts.cc
/gem5/src/arch/arm/interrupts.hh
/gem5/src/arch/arm/intregs.hh
/gem5/src/arch/arm/isa.cc
/gem5/src/arch/arm/isa.hh
/gem5/src/arch/arm/isa/bitfields.isa
/gem5/src/arch/arm/isa/decoder/aarch64.isa
/gem5/src/arch/arm/isa/decoder/arm.isa
/gem5/src/arch/arm/isa/decoder/decoder.isa
/gem5/src/arch/arm/isa/decoder/thumb.isa
/gem5/src/arch/arm/isa/formats/aarch64.isa
/gem5/src/arch/arm/isa/formats/branch.isa
/gem5/src/arch/arm/isa/formats/formats.isa
/gem5/src/arch/arm/isa/formats/fp.isa
/gem5/src/arch/arm/isa/formats/mem.isa
/gem5/src/arch/arm/isa/formats/misc.isa
/gem5/src/arch/arm/isa/formats/neon64.isa
/gem5/src/arch/arm/isa/formats/uncond.isa
/gem5/src/arch/arm/isa/formats/unimp.isa
/gem5/src/arch/arm/isa/includes.isa
/gem5/src/arch/arm/isa/insts/aarch64.isa
/gem5/src/arch/arm/isa/insts/branch.isa
/gem5/src/arch/arm/isa/insts/branch64.isa
/gem5/src/arch/arm/isa/insts/data.isa
/gem5/src/arch/arm/isa/insts/data64.isa
/gem5/src/arch/arm/isa/insts/div.isa
/gem5/src/arch/arm/isa/insts/fp.isa
/gem5/src/arch/arm/isa/insts/fp64.isa
/gem5/src/arch/arm/isa/insts/insts.isa
/gem5/src/arch/arm/isa/insts/ldr.isa
/gem5/src/arch/arm/isa/insts/ldr64.isa
/gem5/src/arch/arm/isa/insts/m5ops.isa
/gem5/src/arch/arm/isa/insts/macromem.isa
/gem5/src/arch/arm/isa/insts/mem.isa
/gem5/src/arch/arm/isa/insts/misc.isa
/gem5/src/arch/arm/isa/insts/misc64.isa
/gem5/src/arch/arm/isa/insts/neon.isa
/gem5/src/arch/arm/isa/insts/neon64.isa
/gem5/src/arch/arm/isa/insts/neon64_mem.isa
/gem5/src/arch/arm/isa/insts/str.isa
/gem5/src/arch/arm/isa/insts/str64.isa
/gem5/src/arch/arm/isa/insts/swap.isa
/gem5/src/arch/arm/isa/operands.isa
/gem5/src/arch/arm/isa/templates/basic.isa
/gem5/src/arch/arm/isa/templates/branch64.isa
/gem5/src/arch/arm/isa/templates/data64.isa
/gem5/src/arch/arm/isa/templates/macromem.isa
/gem5/src/arch/arm/isa/templates/mem.isa
/gem5/src/arch/arm/isa/templates/mem64.isa
/gem5/src/arch/arm/isa/templates/misc.isa
/gem5/src/arch/arm/isa/templates/misc64.isa
/gem5/src/arch/arm/isa/templates/neon.isa
/gem5/src/arch/arm/isa/templates/neon64.isa
/gem5/src/arch/arm/isa/templates/templates.isa
/gem5/src/arch/arm/isa/templates/vfp.isa
/gem5/src/arch/arm/isa/templates/vfp64.isa
/gem5/src/arch/arm/isa_traits.hh
/gem5/src/arch/arm/linux/linux.cc
/gem5/src/arch/arm/linux/linux.hh
/gem5/src/arch/arm/linux/process.cc
/gem5/src/arch/arm/linux/process.hh
/gem5/src/arch/arm/linux/system.cc
/gem5/src/arch/arm/linux/system.hh
/gem5/src/arch/arm/locked_mem.hh
/gem5/src/arch/arm/miscregs.cc
/gem5/src/arch/arm/miscregs.hh
/gem5/src/arch/arm/nativetrace.cc
/gem5/src/arch/arm/pagetable.hh
/gem5/src/arch/arm/process.cc
/gem5/src/arch/arm/process.hh
/gem5/src/arch/arm/registers.hh
/gem5/src/arch/arm/remote_gdb.cc
/gem5/src/arch/arm/remote_gdb.hh
/gem5/src/arch/arm/stage2_lookup.cc
/gem5/src/arch/arm/stage2_lookup.hh
/gem5/src/arch/arm/stage2_mmu.cc
/gem5/src/arch/arm/stage2_mmu.hh
/gem5/src/arch/arm/system.cc
/gem5/src/arch/arm/system.hh
/gem5/src/arch/arm/table_walker.cc
/gem5/src/arch/arm/table_walker.hh
/gem5/src/arch/arm/tlb.cc
/gem5/src/arch/arm/tlb.hh
/gem5/src/arch/arm/types.hh
/gem5/src/arch/arm/utility.cc
/gem5/src/arch/arm/utility.hh
/gem5/src/arch/arm/vtophys.cc
/gem5/src/base/loader/elf_object.cc
/gem5/src/base/loader/elf_object.hh
/gem5/src/base/loader/object_file.cc
/gem5/src/base/loader/object_file.hh
/gem5/src/cpu/BaseCPU.py
/gem5/src/dev/arm/RealView.py
/gem5/src/dev/arm/SConscript
/gem5/src/dev/arm/generic_timer.cc
/gem5/src/dev/arm/generic_timer.hh
/gem5/src/dev/arm/gic_pl390.cc
/gem5/src/dev/arm/vgic.cc
/gem5/src/dev/arm/vgic.hh
/gem5/src/sim/System.py
/gem5/src/sim/process.cc
/gem5/src/sim/serialize.hh
/gem5/src/sim/system.cc
/gem5/src/sim/system.hh
/gem5/system/arm/aarch64_bootloader/LICENSE.txt
/gem5/system/arm/aarch64_bootloader/boot.S
/gem5/system/arm/aarch64_bootloader/makefile
/gem5/util/cpt_upgrader.py
/gem5/util/m5/m5op_arm_A64.S
9420:965d857ac791 07-Jan-2013 Andreas Hansson <andreas.hansson@arm.com>

scons: Enforce gcc >= 4.4 or clang >= 2.9 and c++0x support

This patch checks that the compiler in use is either gcc >= 4.4 or
clang >= 2.9. and enables building with --std=c++0x in all cases. As a
consequence, we can tidy up the hashmap and always have static_assert
available. If anyone wants to use alternative compilers, icc for
example supports c++0x to a similar level and could be added if
needed.

This patch opens up for a more elaborate use of c++0x features that
are present in gcc 4.4 and clang 2.9, e.g. auto typed variables,
variadic templates, rvalues and move semantics, and strongly typed
enums. There will be no going back on this one...

9388:b958d9fa867c 07-Jan-2013 Andreas Hansson <andreas.hansson@arm.com>

scons: Fix libelf linking errors when using clang/llvm

This patch fixes a linking error that occurs when using clang/llvm in
combination with older versions of glibc. The fix involves adding
-std=gnu89 to the command line when compiling libelf as clang defaults
to c99, causing issues with the symbols in sysmacros.h being defined
multiple times.

8946:fb6c89334b86 14-Apr-2012 Andreas Hansson <andreas.hansson@arm.com>

clang/gcc: Fix compilation issues with clang 3.0 and gcc 4.6

This patch addresses a number of minor issues that cause problems when
compiling with clang >= 3.0 and gcc >= 4.6. Most importantly, it
avoids using the deprecated ext/hash_map and instead uses
unordered_map (and similarly so for the hash_set). To make use of the
new STL containers, g++ and clang has to be invoked with "-std=c++0x",
and this is now added for all gcc versions >= 4.6, and for clang >=
3.0. For gcc >= 4.3 and <= 4.5 and clang <= 3.0 we use the tr1
unordered_map to avoid the deprecation warning.

The addition of c++0x in turn causes a few problems, as the
compiler is more stringent and adds a number of new warnings. Below,
the most important issues are enumerated:

1) the use of namespaces is more strict, e.g. for isnan, and all
headers opening the entire namespace std are now fixed.

2) another other issue caused by the more stringent compiler is the
narrowing of the embedded python, which used to be a char array,
and is now unsigned char since there were values larger than 128.

3) a particularly odd issue that arose with the new c++0x behaviour is
found in range.hh, where the operator< causes gcc to complain about
the template type parsing (the "<" is interpreted as the beginning
of a template argument), and the problem seems to be related to the
begin/end members introduced for the range-type iteration, which is
a new feature in c++11.

As a minor update, this patch also fixes the build flags for the clang
debug target that used to be shared with gcc and incorrectly use
"-ggdb".

8737:770ccf3af571 31-Jan-2012 Koan-Sin Tan <koansin.tan@gmail.com>

clang: Enable compiling gem5 using clang 2.9 and 3.0

This patch adds the necessary flags to the SConstruct and SConscript
files for compiling using clang 2.9 and later (on Ubuntu et al and OSX
XCode 4.2), and also cleans up a bunch of compiler warnings found by
clang. Most of the warnings are related to hidden virtual functions,
comparisons with unsigneds >= 0, and if-statements with empty
bodies. A number of mismatches between struct and class are also
fixed. clang 2.8 is not working as it has problems with class names
that occur in multiple namespaces (e.g. Statistics in
kernel_stats.hh).

clang has a bug (http://llvm.org/bugs/show_bug.cgi?id=7247) which
causes confusion between the container std::set and the function
Packet::set, and this is currently addressed by not including the
entire namespace std, but rather selecting e.g. "using std::vector" in
the appropriate places.


/gem5/SConstruct
SConscript
/gem5/src/SConscript
/gem5/src/arch/alpha/tlb.cc
/gem5/src/arch/alpha/tlb.hh
/gem5/src/arch/arm/insts/static_inst.hh
/gem5/src/arch/arm/insts/vfp.hh
/gem5/src/arch/arm/isa/templates/basic.isa
/gem5/src/arch/arm/miscregs.cc
/gem5/src/arch/generic/memhelpers.hh
/gem5/src/arch/mips/faults.cc
/gem5/src/arch/mips/faults.hh
/gem5/src/arch/x86/bios/acpi.hh
/gem5/src/arch/x86/bios/intelmp.cc
/gem5/src/arch/x86/bios/intelmp.hh
/gem5/src/arch/x86/bios/smbios.hh
/gem5/src/base/fast_alloc.cc
/gem5/src/base/range_map.hh
/gem5/src/base/remote_gdb.hh
/gem5/src/base/stl_helpers.hh
/gem5/src/cpu/base.cc
/gem5/src/cpu/base.hh
/gem5/src/cpu/func_unit.hh
/gem5/src/cpu/inorder/cpu.cc
/gem5/src/cpu/inorder/cpu.hh
/gem5/src/cpu/inorder/resource.cc
/gem5/src/cpu/inorder/resource.hh
/gem5/src/cpu/inorder/resource_pool.cc
/gem5/src/cpu/inorder/resource_pool.hh
/gem5/src/cpu/inorder/resources/cache_unit.hh
/gem5/src/cpu/inorder/thread_context.cc
/gem5/src/cpu/nativetrace.hh
/gem5/src/cpu/o3/bpred_unit.hh
/gem5/src/cpu/o3/commit.hh
/gem5/src/cpu/o3/cpu.cc
/gem5/src/cpu/o3/cpu.hh
/gem5/src/cpu/o3/decode.hh
/gem5/src/cpu/o3/decode_impl.hh
/gem5/src/cpu/o3/fetch.hh
/gem5/src/cpu/o3/fu_pool.cc
/gem5/src/cpu/o3/fu_pool.hh
/gem5/src/cpu/o3/iew.hh
/gem5/src/cpu/o3/iew_impl.hh
/gem5/src/cpu/o3/inst_queue.hh
/gem5/src/cpu/o3/inst_queue_impl.hh
/gem5/src/cpu/o3/lsq.hh
/gem5/src/cpu/o3/lsq_unit.hh
/gem5/src/cpu/o3/mem_dep_unit.cc
/gem5/src/cpu/o3/mem_dep_unit.hh
/gem5/src/cpu/o3/rename.hh
/gem5/src/cpu/o3/sat_counter.hh
/gem5/src/cpu/quiesce_event.hh
/gem5/src/cpu/sched_list.hh
/gem5/src/cpu/simple/atomic.cc
/gem5/src/cpu/simple/atomic.hh
/gem5/src/cpu/simple/base.cc
/gem5/src/cpu/simple/base.hh
/gem5/src/cpu/simple/timing.cc
/gem5/src/cpu/simple/timing.hh
/gem5/src/cpu/static_inst.hh
/gem5/src/dev/alpha/tsunami_cchip.cc
/gem5/src/dev/alpha/tsunami_io.cc
/gem5/src/dev/arm/pl111.cc
/gem5/src/dev/arm/pl111.hh
/gem5/src/dev/copy_engine.cc
/gem5/src/dev/disk_image.cc
/gem5/src/dev/disk_image.hh
/gem5/src/dev/ide_ctrl.cc
/gem5/src/dev/ns_gige.cc
/gem5/src/dev/pciconfigall.cc
/gem5/src/dev/pcidev.cc
/gem5/src/mem/cache/base.hh
/gem5/src/mem/cache/tags/iic.cc
/gem5/src/mem/cache/tags/iic_repl/gen.cc
/gem5/src/mem/cache/tags/iic_repl/gen.hh
/gem5/src/mem/cache/tags/iic_repl/repl.hh
/gem5/src/mem/packet.hh
/gem5/src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.cc
/gem5/src/mem/ruby/system/Sequencer.hh
/gem5/src/python/m5/SimObject.py
/gem5/src/sim/core.hh
/gem5/src/sim/process.cc
/gem5/src/sim/process.hh
/gem5/src/sim/process_impl.hh
/gem5/src/sim/serialize.cc
/gem5/src/sim/sim_object.cc
/gem5/src/sim/sim_object.hh
/gem5/src/sim/syscall_emul.hh
8655:e4001326a5ba 09-Jan-2012 Andreas Hansson <andreas.hansson@arm.com>

MAC: Make gem5 compile and run on MacOSX 10.7.2

Adaptations to make gem5 compile and run on OSX 10.7.2, with a stock
gcc 4.2.1 and the remaining dependencies from macports, i.e. python
2.7,.2 swig 2.0.4, mercurial 2.0. The changes include an adaptation of
the SConstruct to handle non-library linker flags, and Darwin-specific
code to find the memory usage of gem5. A number of Ruby files relied
on ambigious uint (without the 32 suffix) which caused compilation
errors.

8349:931ef19535e0 13-Jun-2011 Gabe Black <gblack@eecs.umich.edu>

LibElf: Build the error management code in libelf.

This change makes some minor changes to get the error management code in
libelf to build on Linux and to build it into the library.

7739:f97a5f4d0879 09-Nov-2010 Gabe Black <gblack@eecs.umich.edu>

scons: Work around for old versions of scons mistaking strings for sequences.

6121:18aff7f548c1 21-Apr-2009 Nathan Binkert <nate@binkert.org>

scons: Rename the basic environment from env -> main.
env is used as a local variable all over the place and sometimes it is
easy to get confused as to whether the global env or local env is being
used. This will become especially important when I change the way we
support our variants.

6120:4dcea6c903fa 21-Apr-2009 Nathan Binkert <nate@binkert.org>

scons: Fix two problems with the way that the library path is generated.
1) -L is automatically added, so don't do it ourselves
2) prepend the paths for gzstream and libelf so they are certain to
come first. The problem is that python might add /usr/lib to the path
and the user might have a locally installed version of libelf installed.

5863:f73e06bc8765 09-Feb-2009 Nathan Binkert <nate@binkert.org>

scons: Require SCons version 0.98.1
This allows me to clean things up so we are up to date with respect to
deprecated features. There are many features scheduled for permanent failure
in scons 2.0 and 0.98.1 provides the most compatability for that. It
also paves the way for some nice new features that I will add soon

5765:fdfd6e4aad66 06-Dec-2008 Nathan Binkert <nate@binkert.org>

scons: only use -Wno-pointer-sign with gcc >= 4.3

5711:93eb7f618517 28-Oct-2008 Ali Saidi <saidi@eecs.umich.edu>

Libelf: Append options to CCFLAGS for warning free libelf compile instead of deleting CCFLAGS. Should fix 64bit OS X compile problem.

5601:1acb7016d0e4 09-Oct-2008 Nathan Binkert <nate@binkert.org>

SCons: add code to provide a libm5 shared library.
Targets look like libm5_debug.so. This target can be dynamically
linked into another C++ program and provide just about all of the M5
features. Additionally, this library is a standalone module that can
be imported into python with an "import libm5_debug" type command
line.

5397:58e5b68f7095 07-Apr-2008 Ali Saidi <saidi@eecs.umich.edu>

SCons: Make BATCH options global sticky so libelf is built appropriately.

5274:7888bf966443 19-Nov-2007 Ali Saidi <saidi@eecs.umich.edu>

Compiling: Make sure that libelf is also compiled for 64bit on OS X.

4781:59a75bd0ddf4 28-Jul-2007 Nathan Binkert <nate@binkert.org>

style: Check/Fix whitespace on SCons files

4504:936dfda07b50 31-May-2007 Ali Saidi <saidi@eecs.umich.edu>

This is probably a more scons like way to do this

4500:068356f4fa81 31-May-2007 Nathan Binkert <binkertn@umich.edu>

obey the m5 style

4496:7fe59ed05a61 31-May-2007 Ali Saidi <saidi@eecs.umich.edu>

check that m4 is available before trying to use it

4494:b7c909b5a5e9 30-May-2007 Ali Saidi <saidi@eecs.umich.edu>

Fix compiling on Solaris since Nate's libelf change

SConstruct:
export env after we've set CC/CXX
ext/libelf/SConscript:
pull in the CC/CXX variables from env. Use gm4 if it exists
ext/libelf/elf_begin.c:
ext/libelf/libelf_allocate.c:
include errno.h instead of sys/errno.h
ext/libelf/elf_common.h:
use the more standard uintX_t
ext/libelf/elf_strptr.c:
ext/libelf/elf_update.c:
include sysmacros.h on Solaris for roundup()

4487:a174ee67da68 28-May-2007 Steve Reinhardt <stever@eecs.umich.edu>

Fix M4 command line... wasn't working on zizzer.
A little more concise now.

4484:7c56a6c9c265 26-May-2007 Nathan Binkert <binkertn@umich.edu>

Get rid of GNU libelf and its autoconf nastiness and replace
it with FreeBSD's implementation